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参数资料
| 型号： | CY7C343B-30JIT |
| 厂商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分类： | PLD |
| 英文描述： | OT PLD, 30 ns, PQCC44 |
| 封装： | PLASTIC, LCC-44 |
| 文件页数： | 1/11页 |
| 文件大小： | 178K |
| 代理商： | CY7C343B-30JIT |
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64-Macrocell MAX EPLD
CY7C343B
Cypress Semiconductor Corporation
3901 North First Street
San Jose
, CA 95134
408-943-2600
Document #: 38-03038 Rev. *B
Revised April 9, 2004
Features
64 MAX macrocells in 4 LABs
8 dedicated inputs, 24 bidirectional I/O pins
Programmable interconnect array
Advanced 0.65-micron CMOS technology to increase
performance
Available in 44-pin HLCC, PLCC
Lowest power MAX device
Functional Description
The CY7C343B is a high-performance, high-density erasable
programmable logic device, available in 44-pin PLCC and
HLCC packages.
The CY7C343B contains 64 highly flexible macrocells and 128
expander product terms. These resources are divided into four
Logic Array Blocks (LABs) connected through the Program-
mable Inter-connect Array (PIA). There are 8 input pins, one
that doubles as a clock pin when needed. The CY7C343B also
has 28 I/O pins, each connected to a macrocell (6 for LABs A
and C, and 8 for LABs B and D). The remaining 36 macrocells
are used for embedded logic.
The CY7C343B is excellent for a wide range of both
synchronous and asynchronous applications.
MACROCELL 17
MACROCELL 18
MACROCELL 19
MACROCELL 20
MACROCELL 21
MACROCELL 22
MACROCELL 23
MACROCELL 24
MACROCELL 38
MACROCELL 37
MACROCELL 36
MACROCELL 35
MACROCELL 34
MACROCELL 33
9 INPUT
11 INPUT
12 INPUT
13 INPUT
P
I
A
MACROCELL 1
MACROCELL 2
MACROCELL 3
MACROCELL 4
MACROCELL 5
MACROCELL 6
MACROCELL 56
MACROCELL 55
MACROCELL 54
MACROCELL 53
MACROCELL 52
MACROCELL 51
MACROCELL 50
MACROCELL 49
MACROCELLS 7 - 16
MACROCELLS57 - 64
MACROCELLS 25 - 32
MACROCELLS39 - 48
INPUT 35
INPUT/CLK 34
INPUT 33
INPUT 31
2
4
5
6
7
8
1
44
42
41
40
39
38
37
30
29
28
27
26
24
SYSTEM CLOCK
(3, 14, 25, 36)
(10, 21, 32, 43)
VCC
GND
LAB A
LAB B
LAB D
LAB C
Logic Block Diagram
DEDICATED
INPUTS
I/O PINS
15
16
17
18
19
20
22
23
I/O PINS
相关PDF资料 |
PDF描述 |
|---|---|
| CY7C343B-25JCT | OT PLD, 25 ns, PQCC44 |
| CY7C343B-25JIT | OT PLD, 25 ns, PQCC44 |
| CY7C343B-25JC | OT PLD, 25 ns, PQCC44 |
| CY7C343B-25JI | OT PLD, 25 ns, PQCC44 |
| CY7C343B-30JC | OT PLD, 30 ns, PQCC44 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CY7C343B-35JI | 制造商:QP Semiconductor 功能描述: |
| CY7C344-15JC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C344-15PC | 制造商:Cypress Semiconductor 功能描述:CPLD MAX? Family 600 Gates 32 Macro Cells 0.8um Technology 5V 28-Pin PDIP |
| CY7C344-20JC | 制造商:Cypress Semiconductor 功能描述:CPLD MAX? Family 600 Gates 32 Macro Cells 0.8um Technology 5V 28-Pin PLCC |
| CY7C344-20JI | 制造商:Cypress Semiconductor 功能描述:CPLD MAX? Family 600 Gates 32 Macro Cells 0.8um (CMOS) Technology 5V 28-Pin PLCC 制造商:Cypress Semiconductor 功能描述:Simple EPLD, Programmable Array Logic, 28 Pin, Plastic, PLCC |
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