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参数资料
| 型号： | DAC1353X |
| 英文描述： | DAC1353X 1.2V 8BIT 2MSPS DAC|Data Sheet |
| 中文描述： | DAC1353X 1.2V的8位2MSPS援会|数据资料 |
| 文件页数： | 4/15页 |
| 文件大小： | 228K |
| 代理商： | DAC1353X |
SEC ASIC
DAC1350X
10BIT 75MSPS Quad DAC
ANALOG
PHANTOM CELL INFORMATION
Pin Name
Pin Usage
Pin Layout Guide
AVDD33A
External
- Maintain the large width of lines
as far as the pads.
- place the port positions to
minimize the length of power
lines.
- Do not merge the analog powers
with another power from other
blocks.
- Use good power and ground
source on board.
AVSS33A
External
AVSS33D
External
AVDD33D
External
IRSET
External
- Maintain the larger width and the
shorter length as far as the pads.
- Separate from all other digital
lines.
VREFOUT
External
VBIAS
External
CCOMP
External
IOUT0
External
IOUT3
External
IOUT2
External
IOUT1
External
DTOUT
External/Internal
- Separated from the analog clean
signals if possible.
- Do not exceed the length by
1,000um.
DLDSEL
[1:0]
External/Internal
BGPD
External/Internal
CLK
External/Internal
DACPRE
External/Internal
DACLP[3:0]
External/Internal
PDDAC[3:0]
External/Internal
DATA3[9:0]
External/Internal
DATA2[9:0]
External/Internal
DATA1[9:0]
External/Internal
DATA0[9:0]
External/Internal
dac1350x
10bit 75MSPS Quad-DAC
D
A
C
P
R
E
B
G
P
D
- Pins of the core can be assigned externally (Package pins) or internally (internal ports) depending
on design methods.
The term "External" implies that the pins should be assigned externally like power pins.
The term "External/internal" implies that the applications of these pins depend on the user.
D
T
O
U
T
D
L
D
S
E
L
[0
]
C
L
K
A
V
D
1
8
D
A
T
A
1
[9
]
D
A
T
A
1
[0
]
P
D
A
C
[1
]
D
A
C
L
P
[1
]
D
A
C
L
P
[0
]
P
D
A
C
[0
]
D
A
T
A
0
[1
]
D
A
T
A
0
[9
]
D
L
D
S
E
L
[1
]
D
A
T
A
2
[9
]
D
A
T
A
2
[0
]
P
D
A
C
[2
]
D
A
C
L
P
[2
]
D
A
C
L
P
[3
]
P
D
A
C
[3
]
D
A
T
A
3
[0
]
D
A
T
A
3
[9
]
VREFOUT
AVSS33D
IRSET
AVDD33D
AVSS33A
VBIAS
CCOMP
IOUT0
IOUT1
AVDD33A
AVSS33A
AVDD33A
IOUT2
IOUT3
AVSS33A
12 / 15
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