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参数资料
| 型号： | DAC1391X |
| 英文描述： | DAC1391X 2.5V 12BIT 80MSPS DAC|Data Sheet |
| 中文描述： | DAC1391X 2.5V的12位80Msps的发展援助委员会|数据资料 |
| 文件页数： | 8/15页 |
| 文件大小： | 228K |
| 代理商： | DAC1391X |
SEC ASIC
DAC1350X
10BIT 75MSPS Quad DAC
ANALOG
NAME
I/
O
I/O PAD
PIN DESCRIPTION
INPUTS
PDDAC[3:0]
DI
picc_abb
Individual DAC power down control.
When activated(high), the corresponding DAC is disabled.
DACLP[3:0]
DI
picc_abb
Low power current dumping mode control for each DAC. When selected
(high enables low power mode) the corresponding DAC will run at
reduced power with a slight loss in performance.
CLK
DI
picc_abb
DAC master clock. Input data is sampled with the rising edge of CLK.
DACPRE
DI
picc_abb
Control strobe for the DAC auto-load detection comparator. When
DACPRE transitions high-to-low, the auto-load detect circuit evaluates its
selected input. Appropriate settling time must be allowed before the
comparator output (DTOUT) is used. When not used, DACPRE should
be left high.
DATA0[9:0]
DATA1[9:0]
DATA2[9:0]
DATA3[9:0]
DI
picc_abb
10-bit straight binary digital input for each DAC channel.
BGPD
DI
picc_abb
Power down control for Bandgap and all quad DACs. A high level
disables all quad DACs plus the bandgap reference regardless of the
states of PDDAC0,PDDAC1,PDDAC2,PDDAC3
DLDSEL[1:0]
DI
picc_abb
Selection control for external DAC auto-load detection. Enable of load
for IOUT0 is selected LDSEL[1:0]="00", IOUT2 is DLDSEL[1:0]="01",
IOUT1 is DLDSEL[1:0]="10", IOUT3 is DLDSEL[1:0]="11"
OUTPUT
DTOUT
DO
pot8_abb
Comparator output for detection of resistive load at DAC output. A low
at the detect output indicates that the output voltage of the selected
channel is above 0.53V and therefore that no load is attached.
IOUT0
IOUT1
IOUT2
IOUT3
AO
phoa_abb
Analog Current Output for each of the four DACs
REFERENCES
CCOMP
AB
phoa_abb
Connect external 0.1uF cap to AVDD33A.
IRSET
AB
phoa_abb
External resistor from this node to AVSS33A
defines the full scale
output current for the DACs.
VBIAS
AB
phoa_abb
Connect external 0.1uF cap and 100ohm resistor to
AVDD33A.
VREFOUT
AB
phoa_abb
internal / external voltage reference output
PIN
CONFIGURATION
2 / 15
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