参数资料
型号: DAC7631EB
厂商: TEXAS INSTRUMENTS INC
元件分类: DAC
英文描述: SERIAL INPUT LOADING, 8 us SETTLING TIME, 16-BIT DAC, PDSO20
封装: GREEN, SSOP-20
文件页数: 5/22页
文件大小: 600K
代理商: DAC7631EB
13
DAC7631
The current into the VREFH input and out of VREFL depends
on the DAC output voltage, and can vary from a few
microamps to approximately 0.3mA in dual supply or 0.15mA
in single-supply operation. The reference input appears as a
varying load to the reference. If the reference can sink or
source the required current, a reference buffer is not re-
quired. The DAC7631 features a reference drive and sense
connection such that the internal errors caused by the chang-
ing reference current and the circuit impedances can be
minimized. Figures 5 through 13 show different reference
configurations, and the effect on the linearity and differen-
tial linearity.
Reset DAC Registers
Chip Select
DGND
V
DD
SDI
CLK
CS
V
CC
AGND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DAC7631
V
REFH Sense
V
REFH
V
REFL Sense
V
REFL
SDO
V
SS
V
OUT Sense
V
OUT
NC
RSTSEL
RST
Serial Data In
Clock
Load DAC Registers
Load
LDAC
LOAD
Serial Data Out
0.1
F
1
F
+
+5V
V
OUT
R
W1
R
W2
+2.5V
+V
DIGITAL INTERFACE
Table I shows the basic control logic for the DAC7631. The
interface consists of a serial clock input (CLK), serial data
input (SDI), DAC input register load control signal (LOAD),
and DAC load control signal (LDAC). In addition, a chip
select input (CS) is provided to simplify device selection in
systems with multiple devices. An asynchronous reset input
(RST), triggered by a rising edge, is provided to force start-
up conditions, periodic resets, or emergency resets to a
known state. The action of RST can be selected using the
reset select (RSTSEL) pin.
INPUT
DAC
CS
RST
RSTSEL
LDAC
LOAD
REGISTER
MODE
L
H
X
L
Write
Hold
Write Input
HH
X
H
Hold
Write
Update
H
X
H
Hold
X
L
X
Reset to Zero
X
H
X
Reset to Midscale
TABLE I. DAC7631 Logic Truth Table.
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
SERIAL DATA INPUT
FIGURE 4. Analog Output Closed-loop Configuration. RW1 and RW2 represent wiring resistance.
FIGURE 5. Dual-supply Buffered References.
+V
+2.5V
–2.5V
–V
+V
OPA2234
–V
2200pF
100
100
1000pF
1
2
3
4
V
REFH
V
REFH Sense
V
REFL
V
REFL Sense
DAC7631
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