参数资料
| 型号： | DAC8143FSZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 12/12页 |
| 文件大小： | 0K |
| 描述： | IC DAC 12BIT DAISY-CHAIN 16-SOIC |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 标准包装： | 47 |
| 设置时间： | 380ns |
| 位数： | 12 |
| 数据接口： | 串行 |
| 转换器数目： | 1 |
| 电压电源： | 单电源 |
| 功率耗散（最大）： | 500µW |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 16-SOIC W |
| 包装： | 管件 |
| 输出数目和类型： | 2 电流，单极；2 电流，双极 |
| 采样率（每秒）： | 2.63M |
| 产品目录页面： | 786 (CN2011-ZH PDF) |
DAC8143
–9–
REV. C
Table I. Truth Table
DAC8143 Logic Inputs
Input Register/
Digital Output
Control Inputs
DAC Register
Control Inputs
STB4
STB
3
STB2
STB1
CLR
LD
2
LD
1
DAC8143 Operation
Notes
01
0
g
XX
X
01
g
0
X
Serial Data Bit Loaded from SRI
0
f
0
X
into Input Register and Digital Output
2, 3
g
1
0
X
(SRO Pin) after 12 Clocked Bits.
1X
X
0
X
No Operation (Input Register and SRO)
3
XX
1
X
XX
X
1
Reset DAC Register to Zero Code
0
X
(Code: 0000 0000 0000)
1, 3
(Asynchronous Operation)
1
X
No Operation (DAC Register and SRO)
3
1X
1
0
Load DAC Register with the Contents
3
of Input Register
NOTES
1
CLR = 0 asynchronously resets DAC Register to 0000 0000 0000, but has no effect on Input Register.
2Serial data is loaded into Input Register MSB first, on edges shown. g is positive edge, f is negative edge.
30 = Logic LOW, 1 = Logic HIGH, X = Don’t Care.
APPLICATIONS INFORMATION
UNIPOLAR OPERATION (2-QUADRANT)
The circuit shown in Figures 16 and 17 may be used with an ac
or dc reference voltage. The circuit’s output will range between
0 V and +10(4095/4096) V depending upon the digital input
code. The relationship between the digital input and the analog
output is shown in Table II. The VREF voltage range is the maxi-
mum input voltage range of the op amp or
±25 V, whichever is
lowest.
Table II. Unipolar Code Table
Digital Input
Nominal Analog Output
(VOUT as Shown
MSB
LSB
in Figures 16 and 17)
1 1 1 1 1 1 1 1 1 1 1 1
–VREF
4095
4096
1 0 0 0 0 0 0 0 0 0 0 1
–VREF
2049
4096
1 0 0 0 0 0 0 0 0 0 0 0
–VREF
2048
4096
= –
VREF
2
0 1 1 1 1 1 1 1 1 1 1 1
–VREF
2047
4096
0 0 0 0 0 0 0 0 0 0 0 1
–VREF
1
4096
0 0 0 0 0 0 0 0 0 0 0 0
–VREF
0
4096
= 0
NOTES
1Nominal full scale for the circuits of Figures 16 and 17 is given by
FS = –VREF
4095
4096
.
2Nominal LSB magnitude for the circuits of Figures 16 and 17 is given by
LSB = VREF
1
4096
or VREF(2
–n).
OP-77
+5V
VREF
VDD
RFEEDBACK
IOUT1
IOUT2
AGND
DGND
SRO
(BUFFERED
DIGITAL
DATA OUT)
15pF
+15V
–15V
VOUT
7
6
4
3
2
15
14
13
4, 5
8–11
7
1
2
3
6
12
DAC8143
CONTROL
INPUTS
SRI
(SERIAL
DATA IN)
VREF
–10V
CLR
Figure 16. Unipolar Operation with High Accuracy Op
Amp (2-Quadrant)
OP-42
+5V
VREF
VDD
RFEEDBACK
IOUT1
IOUT2
AGND
DGND
SRO
(BUFFERED
DIGITAL
DATA OUT)
15pF
+15V
–15V
VOUT
7
6
4
3
2
15
14
13
4, 5
8–11
7
1
2
3
6
12
DAC8143
CONTROL
INPUTS
SRI
(SERIAL
DATA IN)
VREF
–10V
R2
50
R1
100
CLR
Figure 17. Unipolar Operation with Fast Op Amp and
Gain Error Trimming (2-Quadrant)
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相关代理商/技术参数 |
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| DAC8143FSZ-REEL | 功能描述:IC DAC 12BIT DAISYCHAIN 16SOIC RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 标准包装:47 系列:- 设置时间:2µs 位数:14 数据接口:并联 转换器数目:1 电压电源:单电源 功率耗散（最大）:55µW 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:管件 输出数目和类型:1 电流，单极；1 电流，双极 采样率（每秒）:* |
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