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参数资料
| 型号： | DC1511A-A |
| 厂商： | Linear Technology |
| 文件页数： | 26/32页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL LTM8042 |
| 软件下载： | LTM8042 Spice Model |
| 设计资源： | DC1511A Design Files DC1511A Schematic |
| 标准包装： | 1 |
| 电流 - 输出 / 通道： | 1A |
| 输出及类型： | 1，非隔离 |
| 输出电压： | 36V |
| 特点： | PWM 亮度控制 |
| 输入电压： | 3 ~ 30 V |
| 已供物品： | 板 |
| 已用 IC / 零件： | LTM8042 |
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LTM8042/LTM8042-1
APPLICATIONS INFORMATION
Thermal Considerations
The LTM8042/LTM8042-1 output current may need to be
derated if it is required to operate in a high ambient tem-
perature or deliver a large amount of continuous power.
The amount of current derating is dependent upon the
input voltage, output power and ambient temperature. The
temperature rise curves given in the Typical Performance
Characteristics section can be used as a guide. These curves
were generated by an LTM8042/LTM8042-1 mounted to a
51cm 2 4-layer FR4 printed circuit board. Boards of other
sizes and layer count can exhibit different thermal behavior,
so it is in-cumbent upon the user to verify proper operation
over the intended system’s line, load and environmental
operating conditions.
The thermal resistance numbers listed in the Pin Configura-
tion section of the data sheet are based on modeling the
μModule package mounted on a test board specified per
JESD51-9 (“Test Boards for Area Array Surface Mount
Package Thermal Measurements”). The thermal coef-
ficients provided are based on JESD 51-12 (“Guidelines
for Reporting and Using Electronic Package Thermal
Information”).
For increased accuracy and fidelity to the actual applica-
tion, many designers use finite element analysis (FEA) to
predict thermal performance. To that end, the Pin Con-
figuration section of the data sheet typically gives four
thermal coefficients:
1. θ JA : thermal resistance from junction to ambient.
2. θ JCBOTTOM : thermal resistance from junction to the
bottom of the product case.
3. θ JCTOP : thermal resistance from junction to top of the
product case.
4. θ JB : thermal resistance from junction to the printed
circuit board.
While the meaning of each of these coefficients may seem to
be intuitive, JEDEC has defined each to avoid confusion and
inconsistency. These definitions are given in JESD 51-12,
and are quoted or paraphrased in the following:
1. θ JA is the natural convection junction-to-ambient air
thermal resistance measured in a one cubic foot sealed
enclosure. This environment is sometimes referred to as
“still air” although natural convection causes the air to
move. This value is determined with the part mounted to
a JESD 51-9 defined test board, which does not reflect
an actual application or viable operating condition.
2. θ JCBOTTOM is the junction-to-board thermal resistance
with all of the component power dissipation flowing
through the bottom of the package. In the typical
μModule regulator, the bulk of the heat flows out the
bottom of the package, but there is always heat flow
out into the ambient environment. As a result, this
thermal resistance value may be useful for comparing
packages but the test conditions don’t generally match
the user’s application.
3. θ JCTOP is determined with nearly all of the component
power dissipation flowing through the top of the
package. As the electrical connections of the typical
μModule regulator are on the bottom of the package,
it is rare for an application to operate such that most of
the heat flows from the junction to the top of the part.
As in the case of θ JCBOTTOM , this value may be useful
for comparing packages but the test conditions don’t
generally match the user’s application.
4. θ JB is the junction-to-board thermal resistance where
almost all of the heat flows through the bottom of the
μModule regulator and into the board, and is really the
sum of the θ JCBOTTOM and the thermal resistance of
the bottom of the part through the solder joints and
through a portion of the board. The board temperature is
measured a specified distance from the package, using
a two sided, two layer board. This board is described
in JESD 51-9.
80421fa
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