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参数资料
| 型号： | DC1511A-B |
| 厂商： | Linear Technology |
| 文件页数： | 18/32页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL LTM8042-1 |
| 软件下载： | LTM8042-1 Spice Model |
| 设计资源： | DC1511A Design Files DC1511A Schematic |
| 标准包装： | 1 |
| 电流 - 输出 / 通道： | 350mA |
| 输出及类型： | 1，非隔离 |
| 输出电压： | 36V |
| 特点： | PWM 亮度控制 |
| 输入电压： | 3 ~ 30 V |
| 已供物品： | 板 |
| 已用 IC / 零件： | LTM8042-1 |
| 相关产品： | LTM8042IV#PBF-ND - IC UMODULE LED DRIVER 56LGA LTM8042IV-1#PBF-ND - IC UMODULE LED DRIVER 56LGA LTM8042EV#PBF-ND - IC UMODULE LED DRIVER 56LGA LTM8042EV-1#PBF-ND - IC UMODULE LED DRIVER 56LGA |
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LTM8042/LTM8042-1
APPLICATIONS INFORMATION
PCB Layout
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8042/LTM8042-1. The device is
nevertheless a switching power supply, and care must be
taken to minimize EMI and ensure proper operation. Even
with the high level of integration, you may fail to achieve
specified operation with a haphazard or poor layout. See
Figures 2, 3 and 4 for suggested layouts of boost, buck
and buck-boost operating modes.
Ensure that the grounding and heat sinking are acceptable.
A few rules to keep in mind are:
1. Place the R T resistor as close as possible to its re-
spective pins.
2. Place the C IN and C VCC capacitor as close as possible
to the V IN and GND connections of the LTM8042/
LTM8042-1.
3. Place the C OUT capacitor as close as possible to the
BSTOUT/BKIN or BSTIN/BKLED – and GND connection
of the LTM8042/LTM8042-1.
4. Place the C IN , C VCC and C OUT capacitors such that their
ground current flows directly adjacent to or underneath
the LTM8042/LTM8042-1.
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8042/LTM8042-1.
Use vias to connect the GND copper area to the board’s
internal ground planes. Liberally distribute these GND vias
to provide both a good ground connection and thermal
path to the internal planes of the printed circuit board.
Pay attention to the location and density of the thermal
vias in Figures 2 through 4. The LTM8042/LTM8042-1
can benefit from the heat sinking afforded by vias that
connect to internal GND planes at these locations, due to
their proximity to internal power handling components.
The optimum number of thermal vias depends upon the
printed circuit board design. For example, a board might
use very small via holes. It should employ more thermal
vias than a board that uses larger holes.
TO LED STRING
GND
C IN
C OUT
LED +
V IN
BSTIN/BKLED –
TG
C VCC
V CC
GND
BSTOUT/BKIN
LED +
TGEN
CTL
80421 F02
GND
R T
THERMAL VIAS TO GROUND PLANE
Figure 2. Suggested Layout for Boost Operation
80421fa
18
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