- 您现在的位置：买卖IC网 > PDF目录17104 > DC1546A (Linear Technology)BOARD DAC LTC2754-16 PDF资料下载
参数资料
| 型号： | DC1546A |
| 厂商： | Linear Technology |
| 文件页数： | 7/28页 |
| 文件大小： | 0K |
| 描述： | BOARD DAC LTC2754-16 |
| 软件下载： | QuikEval System |
| 设计资源： | DC1546A Design Files DC1546A Schematic |
| 标准包装： | 1 |
| 系列： | QuikEval™, SoftSpan™ |
| DAC 的数量： | 4 |
| 位数： | 16 |
| 数据接口： | 串行，SPI? |
| 设置时间： | 2µs |
| DAC 型： | 电流 |
| 已供物品： | 板 |
| 已用 IC / 零件： | LTC2754-16 |
| 相关产品： | DC590B-ND - BOARD DEMO USB SERIAL CONTROLLER LTC2754BIUKG-16#TRPBF-ND - IC DAC 16BIT QUAD IOUT 52-QFN LTC2754BCUKG-16#TRPBF-ND - IC DAC 16BIT QUAD IOUT 52-QFN LTC2754AIUKG-16#TRPBF-ND - IC DAC 16BIT QUAD IOUT 52-QFN LTC2754ACUKG-16#TRPBF-ND - IC DAC 16BIT QUAD IOUT 52-QFN LTC2754BIUKG-16#PBF-ND - IC DAC 16BIT QUAD IOUT 52-QFN LTC2754BCUKG-16#PBF-ND - IC DAC 16BIT QUAD IOUT 52-QFN LTC2754AIUKG-16#PBF-ND - IC DAC 16BIT QUAD IOUT 52-QFN LTC2754ACUKG-16#PBF-ND - IC DAC 16BIT QUAD IOUT 52-QFN |
第1页第2页第3页第4页第5页第6页当前第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页
LTC2754
15
2754f
Readback in M-Span Conguration
If the part is in M-Span conguration and a DAC Span
register is specied for readback, then the data shifted out
of SRO will reect the actual active span. The hardware-
congured output range is therefore software detectable
and available for use in programming.
Examples
1. Using a 24-bit instruction, load DAC A with the unipolar
range of 0V to 10V, output at zero volts and all other DACs
with the bipolar range of ±10V, outputs at zero volts. Note
all DAC outputs should change at the same time.
a) CS/LD
↓
Clock SDI = 0010 1111 0000 0000 0000 0011
b) CS/LD
↑
Input register- Range of all DACs set to bipolar
±10V.
c) CS/LD
↓
Clock SDI = 0010 0000 0000 0000 0000 0001
d) CS/LD
↑
Input register- Range of DAC A set to unipolar 0V
to 10V.
e) CS/LD
↓
Clock SDI = 0011 1111 1000 0000 0000 0000
f) CS/LD
↑
Input register- Code of all DACs set to midscale.
g) CS/LD
↓
Clock SDI = 0011 0000 0000 0000 0000 0000
h) CS/LD
↑
Input register- Code of DAC A set to zero code.
i) CS/LD
↓
Clock SDI = 0100 1111 XXXX XXXX XXXX XXXX
j) CS/LD
↑
Update all DACs for both Code and Range.
k) Alternatively steps i and j could be replaced with
LDAC
.
2. Using a 32-bit load sequence, load DAC C with bipolar
±2.5V and its output at zero volts. Use readback to check
Input register contents before updating the DAC output
(i.e., before copying Input register contents into DAC
register).
a) CS/LD
↓ (Note that after power-on, the code in
Input register is zero)
Clock SDI = 0000 0000 0011 0100 1000 0000
0000 0000
b) CS/LD
↑
Input register- Code of DAC C set to midscale
setting.
c) CS/LD
↓
Clock SDI = 0000 0000 0010 0100 0000 0000
0000 0100
Data out on SRO = 1000 0000 0000 0000 Veries
that Input register- Code DAC C is at midscale
setting.
d) CS/LD
↑
Input register- Range of DAC C set to Bipolar
±2.5V range.
e) CS/LD
↓
Clock SDI = 0000 0000 1010 0100 xxxx xxxx
xxxx xxxx
Data Out on SRO = 0000 0000 0000 0100
Veries that Input register- range of DAC C set to
Bipolar ±2.5V Range.
CS/LD↑
f) CS/LD
↓
Clock SDI = 0000 0000 0100 0100 xxxx xxxx
xxxx xxxx
g) CS/LD
↑
Update DAC C for both Code and Range
h) Alternatively steps f and g could be replaced with
LDAC
.
OPERATION
相关PDF资料 |
PDF描述 |
|---|---|
| 0210490899 | CABLE JUMPER 1.25MM .030M 21POS |
| SCRH5D28-330 | INDUCTOR SMD 33UH 0.72A 10KHZ |
| EEM36DSEN-S13 | CONN EDGECARD 72POS .156 EXTEND |
| 0210490898 | CABLE JUMPER 1.25MM .030M 21POS |
| 0210390965 | CABLE JUMPER 1MM .030M 27POS |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DC1-5-48/12 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog IC |
| DC1-5-48/15 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog IC |
| DC1-5-48/5 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog IC |
| DC1-5-48/9 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog IC |
| DC1-5-5/15 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog IC |
发布紧急采购，3分钟左右您将得到回复。