参数资料
型号: DC1684A-A
厂商: Linear Technology
文件页数: 3/24页
文件大小: 0K
描述: BOARD DAC LTC2758
软件下载: QuikEval System
设计资源: DC1684A Design File
DC1684A Schematic
标准包装: 1
系列: QuikEval™, SoftSpan™
DAC 的数量: 2
位数: 18
数据接口: 串行,SPI?
设置时间: 2.1µs
DAC 型: 电流
工作温度: 0°C ~ 70°C
已供物品:
已用 IC / 零件: LTC2758
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LTC2758
11
2758fa
For more information www.linear.com/LTC2758
OPERATION
Output Ranges
TheLTC2758isadual,current-output,serial-inputprecision
multiplyingDACwithselectableoutputranges.Rangescan
either be programmed in software for maximum flexibility
(each of the DACs can be programmed to any one of six
output ranges) or hardwired through pin-strapping. Two
unipolar ranges are available (0V to 5V and 0V to 10V), and
four bipolar ranges (±2.5V, ±5V, ±10V and –2.5V to 7.5V).
These ranges are obtained when an external precision 5V
reference is used. The output ranges for other reference
voltages are easy to calculate by observing that each range
is a multiple of the external reference voltage. The ranges
can then be expressed: 0 to 1×, 0 to 2×, ±0.5×, ±1×, ±2×,
and –0.5× to 1.5×.
Manual Span Configuration
Multiple output ranges are not needed in some applica-
tions. To configure the LTC2758 to operate in a single span
without additional operational overhead, tie the M-SPAN
pin directly to VDD. The active output range for all DACs is
then set via hardware pin strapping of pins S2, S1 and S0
(rather than through the SPI port); and Write and Update
commands have no effect on the active output span. See
Figure 1 and Table 3.
Tie the M-SPAN pin to ground for normal SoftSpan
operation.
Input and DAC Registers
The LTC2758 has 5 internal registers for each DAC, a total
of 10 registers (see Block Diagram). Each DAC channel
has two sets of double-buffered registers, one set for
the code data, and one for the output range of the DAC,
plus one readback register. Double buffering provides the
LTC2758
M-SPAN
S2
S1
S0
2754 F01
CS/LD SDI SCK
VDD
±10V
+
+
DAC A
DAC B
Figure 1. Using M-SPAN to Configure the LTC2758
for Single-Span Operation (±10V Range Shown)
capabilitytosimultaneouslyupdatethespan(outputrange)
and code, which allows smooth voltage transitions when
changing output ranges. It also permits the simultaneous
updating of multiple DACs.
Each set of double-buffered registers comprises an Input
register and a DAC register.
Input register: The Write operation shifts data from the
SDI pin into a chosen Input register. The Input registers
are holding buffers; Write operations do not affect the
DAC outputs.
DAC register: The Update operation copies the contents
of an Input register to its associated DAC register. The
contents of a DAC register directly updates the associated
DAC output voltage or output range.
Note that updates always include both Code and Span
register sets; but the values held in the DAC registers will
only change if the associated Input register values have
previously been altered via a Write operation.
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