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| 型号： | DC1826A-E |
| 厂商： | Linear Technology |
| 文件页数： | 13/26页 |
| 文件大小： | 0K |
| 描述： | BOARD SAR ADC LTC2389-16 |
| 软件下载： | QuikEval II System |
| 设计资源： | DC1826A Schematic DC1826A Design Files |
| 标准包装： | 1 |
| 系列： | QuikEval-II™ |
| ADC 的数量： | 1 |
| 位数： | 16 |
| 采样率（每秒）： | 2.5M |
| 数据接口： | 串行，并联 |
| 输入范围： | ±4.096 V |
| 在以下条件下的电源（标准）： | 162.5mW @ 2.5MSPS |
| 工作温度： | 0°C ~ 70°C |
| 已用 IC / 零件： | LTC2389-16 |
| 已供物品： | 板 |
| 相关产品： | LTC2389ILX-16#PBF-ND - IC ADC 16BIT PAR/SRL 2.5M 48LQFP LTC2389CLX-16#PBF-ND - IC ADC 16BIT PAR/SRL 2.5M 48LQFP LTC2389IUK-16#PBF-ND - IC ADC 16BIT PAR/SRL 2.5M 48-QFN LTC2389CUK-16#PBF-ND - IC ADC 16BIT PAR/SRL 2.5M 48-QFN LTC2389IUK-16#TRPBF-ND - IC ADC 16BIT PAR/SRL 2.5M 48-QFN LTC2389CUK-16#TRPBF-ND - IC ADC 16BIT PAR/SRL 2.5M 48-QFN LTC2389HLX-16#PBF-ND - IC ADC 16BIT PAR/SRL 2.5M 48LQFP DC718C-ND - DEMO QUIKEVAL-II DATA |
LT6200/LT6200-5
LT6200-10/LT6201
20
62001ff
applicaTions inForMaTion
Amplifier Characteristics
Figure 1 shows a simplified schematic of the LT6200
family, which has two input differential amplifiers in paral-
lel that are biased on simultaneously when the common
mode voltage is at least 1.5V from either rail. This topology
allows the input stage to swing from the positive supply
voltage to the negative supply voltage. As the common
mode voltage swings beyond VCC– 1.5V, current source I1
saturates and current in Q1/Q4 is zero. Feedback is main-
tained through the Q2/Q3 differential amplifier, but with
an input gm reduction of one-half. A similar effect occurs
with I2 when the common mode voltage swings within
1.5V of the negative rail. The effect of the gm reduction is
a shift in the VOS as I1 or I2 saturate.
Input bias current normally flows out of the “+” and “–”
inputs. The magnitude of this current increases when the
input common mode voltage is within 1.5V of the negative
rail, and only Q1/Q4 are active. The polarity of this current
reverses when the input common mode voltage is within
1.5V of the positive rail and only Q2/Q3 are active.
The second stage is a folded cascode and current mir-
ror that converts the input stage differential signals to a
single ended output. Capacitor C1 reduces the unity cross
frequency and improves the frequency stability with-
out degrading the gain bandwidth of the amplifier. The
differential drive generator supplies current to the output
transistors that swing from rail-to-rail.
The LT6200-5/LT6200-10 are decompensated op amps
for higher gain applications. These amplifiers maintain
identical DC specifications with the LT6200, but have a
reduced Miller compensation capacitor CM. This results
in a significantly higher slew rate and gain bandwidth
product.
Input Protection
There are back-to-back diodes, D1 and D2, across the
+ and – inputs of these amplifiers to limit the differential
input voltage to ±0.7V. The inputs of the LT6200 family
do not have internal resistors in series with the input
transistors. This technique is often used to protect the
input devices from overvoltage that causes excessive
currents to flow. The addition of these resistors would
significantly degrade the low noise voltage of these
amplifiers. For instance, a 100Ω resistor in series with
each input would generate 1.8nV/√Hz of noise, and the
total amplifier noise voltage would rise from 0.95nV/√Hz
to 2.03nV/√Hz. Once the input differential voltage ex-
ceeds ±0.7V, steady-state current conducted though
the protection diodes should be limited to ±40mA.
This implies 25Ω of protection resistance per volt of
continuous overdrive beyond ±0.7V. The input diodes
are rugged enough to handle transient currents due to
amplifier slew rate overdrive or momentary clipping
without these resistors.
DIFFERENTIAL
DRIVE
GENERATOR
R1
R2
R3
R4
R5
Q2
Q3
Q5
Q6
Q9
Q8
Q7
Q10
Q11
Q1
Q4
I1
I2
D3
D2
D1
DESD2
DESD4
DESD3
DESD1
DESD5
DESD8
DESD7
DESD6
+
–
CM
C1
+V
–V
+V
–V
V+
V–
6203/04 F01
BIAS
VSHDN
Figure 1. Simplified Schematic
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