参数资料
型号: DDU4F-5500M
厂商: DATA DELAY DEVICES INC
元件分类: 延迟线
英文描述: ACTIVE DELAY LINE, TRUE OUTPUT, DIP8
封装: LOW PROFILE, DIP-14/8
文件页数: 4/4页
文件大小: 61K
代理商: DDU4F-5500M
DDU4F
Doc #97033
DATA DELAY DEVICES, INC.
4
12/10/97
Tel: 973-773-2299
Fax: 973-773-9672
http://www.datadelay.com
DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT:
OUTPUT:
Ambient Temperature: 25
oC
± 3oC
Load:
1 FAST-TTL Gate
Supply Voltage (Vcc):
5.0V
± 0.1V
Cload:
5pf
± 10%
Input Pulse:
High = 3.0V
± 0.1V
Threshold:
1.5V (Rising & Falling)
Low = 0.0V
± 0.1V
Source Impedance:
50
Max.
Rise/Fall Time:
3.0 ns Max. (measured
between 0.6V and 2.4V )
Pulse Width:
PWIN = 1.5 x Total Delay
Period:
PERIN = 10 x Total Delay
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
T1
OUT
TRIG
IN
REF
TRIG
Test Setup
DEVICE UNDER
TEST (DUT)
TIME INTERVAL
COUNTER
PULSE
GENERATOR
COMPUTER
SYSTEM
PRINTER
IN
T2
T3
T4
T5
Timing Diagram For Testing
TRISE
TFALL
PERIN
PWIN
TRISE
TFALL
0.6V
1.5V
2.4V
1.5V
VIH
VIL
VOH
VOL
INPUT
SIGNAL
OUTPUT
SIGNAL
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