参数资料
型号: DEMO56F8014-E
厂商: Freescale Semiconductor
文件页数: 12/124页
文件大小: 0K
描述: BOARD DEMO MC56F8014 W/UNIV PS
标准包装: 1
类型: MCU
适用于相关产品: 56F8014
所含物品: 板,线缆,CD,电源
配用: APMOTOR56F8000E-ND - KIT DEMO MOTOR CTRL SYSTEM
相关产品: MC56F8014VFAE-ND - IC DIGITAL SIGNAL CTRLR 32-LQFP
Inter-Integrated Circuit Interface (I2C) Timing
56F8014 Technical Data, Rev. 11
Freescale Semiconductor
109
10.12 Inter-Integrated Circuit Interface (I2C) Timing
Table 10-17 I2C Timing
Characteristic
Symbol
Standard Mode
Fast Mode
Unit
MinimumMaximumMinimum
Maximum
SCL Clock Frequency
fSCL
0
100
0
400
kHz
Hold time (repeated ) START
condition. After this period, the
first clock pulse is generated.
tHD; STA
4.0
0.6
μs
LOW period of the SCL clock
tLOW
4.7
1.25
μs
HIGH period of the SCL clock
tHIGH
4.0
0.6
μs
Set-up time for a repeated START
condition
tSU; STA
4.7
0.6
μs
Data hold time for I2C bus devices
tHD; DAT
01
1. A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VIH min of the SCL signal) to
bridge the undefined region of the falling edge of SCL.
3.452
2. The maximum tHD; DAT has only to be met if the device does not stretch the LOW period (tLOW) of the SCL signal.
01
0.92
μs
Data set-up time
tSU; DAT
250
1003
3. A Fast mode I2C bus device can be used in a Standard mode I2C bus system, but the requirement tSU; DAT > = 250ns must then
be met. This will automatically be the case if the device does not stretch the LOW period of the SCL signal. If such a device does
stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line
trmax + tSU; DAT = 1000 + 250 = 1250ns (according to the Standard mode I
2C bus specification) before the SCL line is released.
ns
Rise time of both SDA and SCL
signals
tr
1000
2 +0.1Cb
4
4. Cb = total capacitance of the one bus line in pF.
300
ns
Fall time of both SDA and SCL
signals
tf
300
2 +0.1Cb
4
300
ns
Set-up time for STOP condition
tSU; STO
4.0
0.6
μs
Bus free time between STOP and
START condition
tBUF
4.7
1.3
μs
Pulse width of spikes that must be
suppressed by the input filter
tSP
N/A
0.0
50
ns
相关PDF资料
PDF描述
DEMO56F8014 BOARD DEMO MC56F8014 W/US PS
VE-BTR-EY-F2 CONVERTER MOD DC/DC 7.5V 50W
VE-BTR-EY-F1 CONVERTER MOD DC/DC 7.5V 50W
VE-BTR-EX-S CONVERTER MOD DC/DC 7.5V 75W
VE-BTR-EW-S CONVERTER MOD DC/DC 7.5V 100W
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