参数资料
型号: DG441ETE+T
厂商: Maxim Integrated Products
文件页数: 6/9页
文件大小: 0K
描述: IC SWITCH QUAD SPST 16TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
功能: 开关
电路: 4 x SPST - NC
导通状态电阻: 160 欧姆
电压电源: 单/双电源
电压 - 电源,单路/双路(±): 10 V ~ 30 V,±4.5 V ~ 20 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-WQFN 裸露焊盘
供应商设备封装: 16-TQFN-EP(5x5)
包装: 带卷 (TR)
Applications Information
Operation with Supply Voltages
Other Than ±15V
Using supply voltages other than ±15V reduces the
analog signal range. The DG441/DG442 switches oper-
ate with ±4.5V to ±20V bipolar supplies or with a +10V
to +30V single supply; connect V- to 0V when operating
with a single supply. Also, all device types can operate
with unbalanced supplies such as +24V and -5V. The
Typical Operating Characteristics graphs show typical
on-resistance with ±20V, ±15V, ±10V, and ±5V sup-
plies. (Switching times increase by a factor of two or
more for operation at ±5V.)
Overvoltage Protection
Proper power-supply sequencing is recommended for
all CMOS devices. Do not exceed the absolute maxi-
mum ratings because stresses beyond the listed rat-
ings can cause permanent damage to the devices.
Always sequence V+ on first, followed by V- and logic
inputs. If power-supply sequencing is not possible, add
two small, external signal diodes in series with supply
pins for overvoltage protection (Figure 1). Adding exter-
nal diodes reduces the analog-signal range to 1V
below V+ and 1V above V-, but low switch resistance
and low leakage characteristics are unaffected. Device
operation is unchanged, and the difference between
V+ and V- should not exceed +44V.
Pin Description
DG441/DG442
Improved, Quad, SPST Analog Switches
6
_______________________________________________________________________________________
V+
S
V-
D
Vg
Figure 1. Overvoltage Protection Using External Blocking Diodes
PIN
DIP/SO
THIN
QFN-EP
NAME
FUNCTION
1, 16, 9,
8
15, 14,
7, 6
IN1–IN4
Input
2, 15,
10, 7
16, 13,
8, 5
D1–D4
Analog Switch Drain Terminal
3, 14,
11, 6
1, 12, 9,
4
S1–S4
Analog Switch Source
Terminal
4
2
V-
Negative-Supply Voltage Input
5
3
GND
Ground
12
10
N.C.
Not Internally Connected
13
11
V+
Positive-Supply Voltage
Input—Connected to Substrate
——
EP
Exposed Pad. Connect EP to
V+. Do not use EP as a sole
V+ connection. (Thin QFN
package only.)
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