DG884
Vishay Siliconix
Document Number: 70071
S-52433—Rev. G, 20-Dec-04
www.vishay.com
1
8 x 4 Wideband Video Crosspoint Array
FEATURES
Routes Any Input to Any Output
Wide Bandwidth: 300 MHz
Low Crosstalk:
85 dB @ 5 MHz
Double Buffered TTL-Compatible
Latches with Readback
Low r
DS(on)
: 45
Optional Negative Supply
BENEFITS
Reduced Board Space
Improved System Bandwidth
Improved Channel Off-Isolation
Simplified Logic Interfacing
Allows Bipolar Signal Swings
Reduced Insertion Loss
High Reliability
APPLICATIONS
Wideband Signal Routing and
Multiplexing
High-End Video Systems
NTSC, PAL, SECAM Switchers
Digital Video Routing
ATE Systems
DESCRIPTION
The DG884 contains a matrix of 32 T-switches configured in
an 8
4 crosspoint array. Any of the IN/OUT pins may be
used as an input or output. Any of the IN pins may be switched
to any or simultaneously to all OUT pins.
The DG884 is built on a proprietary D/CMOS process that
combines low capacitance switching DMOS FETs with low
power CMOS control logic and drivers. The ground lines
between adjacent signal input pins help to reduce crosstalk.
The low on-resistance and low on-capacitance of the DG884
make it ideal for video and wideband signal routing.
Control data is loaded individually into four Next Event latches.
When all Next Event latches have been programmed, data is
transferred into the Current Event latches via a SALVO
command. Current Event latch data readback is available to
poll array status.
Output disable capabilities make it possible to parallel multiple
DG884s to form larger switch arrays. DIS outputs provide
control signals used to place external buffers in a power saving
mode.
For additional information see applications note AN504
(FaxBack document number 70610).
FUNCTIONAL BLOCK DIAGRAM
IN
1
IN
2
IN
3
IN
4
IN
5
IN
6
IN
7
IN
8
OUT
1
OUT
2
OUT
3
OUT
4
A
3
A
2
A
1
A
0
B
0
B
1
CS
WR
I/O
I/O Control
Logic
Decode Logic, Switch Drivers
Current Event Latches
Next Event Latches
8 4 Switch Matrix
4 Disable Outputs
RS
SALVO