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DGP12 Single-Output DC-DC Series Data Sheet
MCD10150 Rev. 1.0, 08-Mar-10
Page 2 of 4
www.power-one.com
NOTES
:
(1) All parameters measured at Tc = 25 °C, nominal input voltage and
full-rated load unless otherwise noted.
(2) Reduced output power available at 3.5 V input. Full output power
is available above 4.6 V input.
(3) Noise measurement bandwidth is 0-20 MHz for peak-to-peak
measurements; 10 kHz to 1 MHz for RMS measurements. Output
noise is measured with a 0.01 μF ceramic capacitor in parallel with a
1μF, 35V Tantalum capacitor located 1” away from the converter to
simulate your PCB’s standard decoupling. Input reflected ripple is
measured into a 10VμH source impedance.
(4) Short-term stability is specified after a 30-minute warmup at full
load, constant line, and recording the drift over a 24-hour period.
(5) No minimum load required for operation. Dynamic regulation may
degrade when run with less than 5% load.
(6) Less than 30 seconds.
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DGP12 SERIES APPLICATION NOTES:
External Capacitance Requirements
No external capacitance is required for operation of the
DGP12 Series. The use of input capacitors with less
than 0.5 Ohms ESR may cause peaking in the input filter
and degrade filter performance. External output
capacitance is not required for operation. However, it is
recommended that 1 μF to 10 μF of tantalum and 0.001
to 0.1 μF ceramic capacitance be selected for reduced
system noise. Additional output capacitance may be
added for increased filtering, but should not exceed
400 μF.
Negative Outputs
A negative output voltage may be obtained by
connecting the +OUT to circuit ground and connecting
-OUT as the negative output.
(Continued on page 3)