参数资料
型号: DLP-FPGA-M
厂商: DLP Design Inc
文件页数: 3/10页
文件大小: 0K
描述: MODULE USB-TO-FPGA TOOL W/MANUAL
标准包装: 1
主要目的: 接口,USB 至 FPGA
嵌入式: 是,FPGA / CPLD
已用 IC / 零件: FT2232D,XC3S250E-4TQ144
主要属性: USB 至 FPGA,40 I/O 引脚,SRAM: 128k x 8
次要属性: 手册中有 4 个实验室,250k 系统栅极,5.5k 逻辑单元
已供物品: 板,手册
相关产品: XC3S250E-4TQG144I-ND - IC FPGA SPARTAN-3E 250K 144-TQFP
768-1010-6-ND - IC USB FS DUAL UART/FIFO 48-LQFP
768-1010-1-ND - IC USB FS DUAL UART/FIFO 48-LQFP
768-1010-2-ND - IC USB FS DUAL UART/FIFO 48-LQFP
122-1524-ND - IC SPARTAN-3E FPGA 250K 144TQFP
其它名称: 813-1009
Rev. 1.4 (November 2010)
2
DLP Design, Inc.
1.0 INTRODUCTION
The DLP-FPGA Module is a low-cost, compact prototyping module that can be used for rapid proof of
concept or for educational environments. The module is based on the Xilinx Spartan 3E and Future
Technology Devices International’s FT2232D Dual-Channel USB IC. Used by itself or with the
optional 200-page training manual, the DLP-FPGA provides both the beginner as well as the
experienced engineer with a rapid path to developing FPGA-based designs. When combined with the
free WebPACK Tools from Xilinx, this module is more than sufficient for creating anything from
basic logical functions to a highly complex system controller.
As a bonus feature, one channel of the dual-channel USB interface is used to load user bit files
directly to the SPI Flash—no external programmer is required. This represents a savings of as much
as $200 in that no additional programming cable is required for configuring the FPGA. All that is
needed to load bit files to the DLP-FPGA is a Windows software utility (free with purchase), a
Windows PC and a USB cable. The module can also be programmed from within the Xilinx ISE tool
environment using a Xilinx programming cable (purchased separately).
The DLP-FPGA is fully compatible with the free ISE WebPACK tools from Xilinx. ISE WebPACK
offers the ideal development environment for FPGA designs with HDL synthesis and simulation,
implementation, device fitting and JTAG programming.
The DLP-FPGA has on-board voltage regulators that generate all required power supply voltages
from a single 5-volt source. Power for the module can be taken from either the host USB port or from
a user-supplied, external 5-volt power supply.
Connection to user electronics is made via a 50-pin, 0.9-inch wide, industry-standard 0.025 square
inch post DIP header. Other on-board features include a 128K x 8 static RAM IC for user projects,
and both JTAG and SPI Flash interface ports for connection to Xilinx programming tools.
2.0 TRAINING MANUAL
A 200+ page training manual for the DLP-FPGA is also available. While this manual is designed to
provide entry-level instruction for those new to designing with FPGAs, it is recommended for
developers who have some experience with FPGA products and associated development tools. An
ISE WebPACK Software installation DVD is included with the manual.
The manual is comprised of 5 Chapters and 4 Labs as outlined below:
Chapter 1: Installing the Xilinx ISE WebPACK tools and Understanding the Design Flow
Chapter 2: Lab 1: Implementing a Simple AND Gate: Create a New Project, Implement the Design,
View the Synthesized Design, View the Placed and Routed Design
Chapter 3: Lab 2: Heartbeat: Understanding the Digital Clock Manager (DCM), Methods of Starting
ISE Project Navigator, VHDL Module Structure, Utilizing Hierarchy, Adding the DCM Component,
Adding the Heartbeat Component, Connecting the Components, Synthesizing the Design Using XST,
Simulating the Design Using the ISE Simulator, Adding the User Constraint File, Implementing the
Design, Download the Design to the FPGA
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