参数资料
| 型号： | DLP-TXRX-G |
| 厂商： | DLP Design Inc |
| 文件页数： | 3/7页 |
| 文件大小： | 0K |
| 描述： | MODULE USB-TO-TTL SRL UART CONV |
| 产品目录绘图： | DLP-TXRX-G |
| 标准包装： | 1 |
| 系列： | DLP-TXRX |
| 类型： | USB 至 UART |
| 连接器类型： | 迷你型 B 至 SIL（单直插式） |
| 产品目录页面： | 635 (CN2011-ZH PDF) |
| 其它名称： | 813-1017 |
1.3 DTR Open Collector Output
Pin 4 of the DLP-TXRX-G is an open-collector output that is controlled by the DTR#
output of the FT232RL. Upon power up of the DLP-TXRX-G (i.e. when connected to
the host PC), pin 4 is initially driven low via an open-collector transistor until the host
application opens the COM port that the DLP-TXRX-G is assigned to. Once the port is
opened, pin 4 becomes high-impedance. From this point forward, the state of pin 4 can
be changed under software control via the user’s application program by setting and
clearing DTR#.
NOTE: if pin 4 is used to reset an external microcontroller, then upon power up the
processor will not run until the COM port is opened by the host application.
1.4 VCCIO Input
Pin 5 is used to provide power to the I/O pins of the FT232RL in instances where the
external microcontroller/DSP/FPGA/etc is operating at a voltage other than 5 volts. The
acceptable input voltage range on Pin 5 is 1.8 to 5.25 volts. If the external processor is
running at 5.0 volts then Pin 5 can be left disconnected.
If the external processor is running at a voltage other than 5 volts then the solder bridge at
location ‘5’ on the DLP-TXRX-G pcb must be removed and a solder bridge at location
‘3’ must be applied in order for the voltage applied to pin 5 to be used.
Rev 1.4 (Oct 2008)
3
DLP-TXRX DLP Design, Inc.
相关PDF资料 |
PDF描述 |
|---|---|
| DLP-USB1232H | MODULE USB-TO-UART/FIFO HS 18DIP |
| DLP-USB232M-G | MODULE USB-TO-TTL SRL UART CONV |
| DLP-USB232R | MODULE USB-TO-SRL UART 18-DIP |
| DLP-USB245M-G | MODULE USB-TO-TTL PARL FIFO CONV |
| DLP-USB245R | MODULE USB-TO-PARL FIFO 18-DIP |
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