www.in
fi
neon.com/opto
1-888-In
fi
neon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG
Regensburg, Germany
www.osram-os.com
+49-941-202-7178
2000 In
fi
neon Technologies Corp.
Optoelectronics Division
San Jose, CA
Appnote 17
4
May 31, 2000-12
digit worst cast) should be avoided, since this loss is in addition to
any inaccuracies or load regulation limitations of the power supply.
The 5 volt power supply for the displays should be the same one
supplying V
CC
to all logic devices which drive the display devices.
If a separate supply must be used, then local buffers using hex
non-inverting gates should be used on all inputs and these buffers
should be powered from the display power supply. This precau-
tion is to avoid logic inputs higher than display V
up or line transients.
CC
during power
Figure 5.
Interfacing the 3416
A general and straightforward interface circuit is shown in Figure
6. This scheme can easily interface to μP systems or any other
systems which can provide the seven data lines, appropriate
address, and control lines.
Figure 6. General interface circuit
H
H
H
H
H
H
H
H
H
Blank
Previous Characters
Normal Data Entry
Stored Cursors
NC
NC
NC
L
H
H
H
H
H
H
H
H
H
H
NC
NC
NC
NC
NC
D
D
D
BL CE1 CE2 CUE CU WR CLR A
1
A
0
D6 D5 D4 D3 D2 D1 D0
X
H
X
X
L
L
L
L
L
L
L
L
H
L
H
–
L
Digit Digit Digit Digit
3 2 1 0
See Character Set
Loading Cursor
Loading Data
X
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
H
X
X
X
H
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
H
X
X
X
X
L
L
H
H
L
H
X
X
X
X
L
H
L
H
L
L
–
X
X
X
X
H
H
H
H
H
H
–
X
X
X
X
L
L
L
L
L
L
–
X
X
X
X
L
L
L
L
L
L
–
X
X
X
X
L
L
L
L
L
H
–
X
X
X
X
L
L
L
H
H
L
–
X
X
X
X
L
H
H
L
L
H
–
X
X
X
X
H
L
H
L
H
H
–
X
X
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
L
L
H
H
H
L
L
L
L
H
L
H
X
H
L
L
L
L
H
L
H
H
H
H
H
H
H
H
H
H
X
X
L
L
H
H
X
L
X
X
X
L
H
L
H
X
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
H
H
H
H
X
L
X
NC
NC
NC
NC
C
C
C
K
NC
NC
NC
B
B
NC
B
B
NC
NC
A
A
NC
A
E
E
D
D
NC
NC
K
K
NC
B
B
E
E
E
X = Don
‘
t care
NC = No change from previously displayed characters
= at half brightness
Display
D15
Decoder
Display
Display
Display
Vcc
GND
D
0
–D
6
A2
A3
CE
7
/
CU
CUE
BL
CLR
WR
A0
A1
D12 D11
D8 D7
D4 D3
D0
Parallel I/O
The parallel I/O device of a microprocessor can easily be con-
nected to the circuit in Figure 6. One eight bit output port can
provide the seven input data bits and the cursor (CU).
Another eight bit output port can contain the address and
chip enable information and the other control signals.
INIT:
MVI A,80H
OUT CONTROL
;CONTROL DATA MODE 0
;LOAD CONTROL REGISTER
CUSR:
MVI A,00H
OUT PORT A
MVI B, 0FH
;CLEAR CURSOR DATA
;LOAD DATA PORT
;SET CHARACTER COUNTER
CUSRI
:MOV A, B
CALL DSPWT
DCR B
JNZ CUSRI
MOV A, B
CALL DSPWT
MVI A, FFH
OUT PORT B
;
;WRITE SUBROUTINE
;DECREMENT COUNTER
;DIGIT 0
;
;
;SET DATA FOR CONTROL
;LOAD CONTROL LINES
DISP:
LXI H, TABLE
;SET TABLE ADDRESS
DISP1
MOV A, M
OUT PORT A
MOV A, B
CALL DSPWT
INX H
INR B
MVI A, 10H
CMP B
JNZ DISP1
HALT
;MOVE TABLE DATA INTO
ACCUMULATOR
;LOAD DATA PORT
;
;LOAD ADDRESS AND
CONTROL
;INCREMENT TABLE
ADDRESS
;INCREMENT COUNTER
SET # OF DIGITS
;
;16 CHARACTERS
;END OF PROGRAM
DSPWT
:ORI F0H
OUT PORT C
ANI 7FH
OUT PORT C
ORI F0H
OUT PORT C
RET
;SET CONTROL BITS OFF
;LOAD CONTROL
;SET WRITE BIT ON
;LOAD WRITE
ORI F0H
;LOAD CONTROL
TABLE:
DB
DB
DB
DB
DB
DB
DB
DB
DB
DB
DB
DB
DB
DB
DB
DB
;0C3H
;0C9H
;0D4H
;0D3H
;0C1H
;0D4H
;0CEH
;0C1H
;0C6H
;0A0H
;0D3H
;0D4H
;0C8H
;0C7H
;0C9H
;0CCH