参数资料
型号: DM300014
厂商: Microchip Technology
文件页数: 42/72页
文件大小: 0K
描述: BOARD DEMO DSPICDEM 1.1 GEN PURP
标准包装: 1
dsPICDEM? 1.1 Development Board User’s Guide
Following is a summary of the processing time for each of the main demo functions.
The data is based upon a 256-sample size.
? Acquisition of 256 discrete sinewave data points sampled at 8 kHz
- Total acquisition time = 32 mS (256/8000)
? FIR filtering – 72,734 instruction cycles for block processing 256 samples in a
273-tap band-pass filter
- 9.87 mS @ 7.3728 MIPS
? IIR filtering – 28,649 instruction cycles for block processing 256 samples in a
9-section bi-quad bandpass filter
- 3.89 mS @ 7.3728 MIPS
? 256-point complex FFT – 18,176 instruction cycles
- 2.47 mS @ 7.3728 MIPS
Note:
Filtering and FFT operations may be interrupted by the DCI, Timer2 or
UART2 modules. The time metrics presented above account for the
interrupt handler processing time from these interrupts.
? The interrupt-driven UART2 transmitter is triggered every 1.14 seconds by Timer3
to send out approximately 145 characters.
- At 57600 baud, transmission of 145 characters requires approximately 25 mS
? SPI 2 transmits 160 characters (80 control and 80 data) @ F CY /8 Hz (where
F CY = 7.3728 MHz) to the PIC18F242 LCD controller for LCD screen updates.
3.5.1
Performance Metric Summary with FIR Filter
The overall CPU performance metric is calculated on how many complete processing
cycles can be performed over a 1 second interval. In one second, the dsPIC30F
spends the following amounts of time in each of the three major functions:
? FFT Computation:
- 22.55 x 256-point complex FFTs = 55.69 mS
? FIR Filter Computation:
- 22.55 x 273-tap FIR filters = 223 mS
Coefficients stored in program memory
? CPU Idle:
- Waiting for ADC data = 721 mS
The 22.55 multiplier used in the above computations is based upon how many times in
one second 256 samples can be acquired and then processed by the FIR and FFT
algorithms.
For example:
? 32 mS for acquisition of 256 samples
? 9.87 mS for FIR filtering
? 2.47 mS for 256-point FFT
Adding these three major timing metrics results in 44.34 mS. Therefore, this
44.34 mS cycle is repeated 22.55 times in a 1 second interval.
Total MIPS required = 2.1 MIPS out of available 7.3728 MIPS.
FIR filter specifications are listed in Table 3-5.
DS70099B-page 38
Advance Information
? 2003 Microchip Technology Inc.
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