- 您现在的位置：买卖IC网 > PDF目录16414 > DP83848C-MAU-EK (National Semiconductor)BOARD EVALUATION DP83848C PDF资料下载
参数资料
| 型号： | DP83848C-MAU-EK |
| 厂商： | National Semiconductor |
| 文件页数： | 24/86页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION DP83848C |
| 标准包装： | 1 |
| 主要目的： | 接口，以太网 |
| 已用 IC / 零件： | DP83848C |
| 已供物品： | 板 |
| 相关产品： | DP83848CVVX/NOPBTR-ND - TXRX ETHERNET PHYTER 48-LQFP DP83848CVV-ND - IC TXRX ETHERNET PHYTER 48-LQFP |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页当前第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页
29
www.national.com
DP
83
84
8
C
4.2.2.2 Base Line Wander Compensation
The DP83848C is completely ANSI TP-PMD compliant and
includes Base Line Wander (BLW) compensation. The
BLW compensation block can successfully recover the TP-
PMD defined “killer” pattern.
BLW can generally be defined as the change in the aver-
age DC content, relatively short period over time, of an AC
coupled digital transmission over a given transmission
medium. (i.e., copper wire).
BLW results from the interaction between the low fre-
quency components of a transmitted bit stream and the fre-
quency response of the AC coupling component(s) within
the transmission system. If the low frequency content of
the digital bit stream goes below the low frequency pole of
the AC coupling transformers then the droop characteris-
tics of the transformers will dominate resulting in potentially
serious BLW.
The digital oscilloscope plot provided in Figure 9 illustrates
the severity of the BLW event that can theoretically be gen-
erated during 100BASE-TX packet transmission. This
event consists of approximately 800 mV of DC offset for a
period of 120
s. Left uncompensated, events such as this
can cause packet loss.
4.2.3 Signal Detect
The signal detect function of the DP83848C is incorporated
to meet the specifications mandated by the ANSI FDDI TP-
PMD Standard as well as the IEEE 802.3 100BASE-TX
Standard for both voltage thresholds and timing parame-
ters.
Note that the reception of normal 10BASE-T link pulses
and fast link pulses per IEEE 802.3u Auto-Negotiation by
the 100BASE-TX receiver do not cause the DP83848C to
assert signal detect.
4.2.4 MLT-3 to NRZI Decoder
The DP83848C decodes the MLT-3 information from the
Digital Adaptive Equalizer block to binary NRZI data.
4.2.5 NRZI to NRZ
In a typical application, the NRZI to NRZ decoder is
required in order to present NRZ formatted data to the
descrambler.
4.2.6 Serial to Parallel
The 100BASE-TX receiver includes a Serial to Parallel
converter which supplies 5-bit wide data symbols to the
PCS Rx state machine.
Figure 9. 100BASE-TX BLW Event
相关PDF资料 |
PDF描述 |
|---|---|
| 2-5492591-0 | CA 50/125UMRIS SCDUP/2.5BAY 20M1 |
| 6278899-1 | CA,62.5,MTRJ-SC |
| L-07W18NKV4T | WIREWOUND INDUCTOR 18NH 0402 |
| ECM24DRSN | CONN EDGECARD 48POS DIP .156 SLD |
| 1-6828318-2 | C/A,2.0MM,RISER,XG,AQUA,LC-SC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DP83848C-POE-EK | 功能描述:以太网开发工具 DP83848 POE CARD COMM TEMP RoHS:否 制造商:Micrel 产品:Evaluation Boards 类型:Ethernet Transceivers 工具用于评估:KSZ8873RLL 接口类型:RMII 工作电源电压: |
| DP83848CVV | 制造商:Texas Instruments 功能描述:IC, 10/100 ETHERNET PHY, SMD, LQFP48 |
| DP83848CVV/NOPB | 功能描述:以太网 IC PHYTER COMMERCIAL TEMP SGL PORT RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| DP83848CVV/NOPB | 制造商:Texas Instruments 功能描述:Ethernet Transceiver |
| DP83848CVVX | 制造商:Texas Instruments 功能描述:PHY 1-CH 10Mbps/100Mbps 48-Pin LQFP T/R |
发布紧急采购，3分钟左右您将得到回复。