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参数资料
| 型号： | DS1010S-60/T&R |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 4/6页 |
| 文件大小： | 0K |
| 描述： | IC DELAY LINE 10TAP 16-SOIC |
| 标准包装： | 1,000 |
| 标片/步级数： | 10 |
| 功能： | 不可编程 |
| 延迟到第一抽头： | 6ns |
| 接头增量： | 6ns |
| 可用的总延迟： | 60ns |
| 独立延迟数： | 1 |
| 电源电压： | 4.75 V ~ 5.25 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 16-SOIC W |
| 包装： | 带卷 (TR) |
DS1010
4 of 6
NOTES:
1. All voltages are referenced to ground.
2. Measured with outputs open.
3. VCC = 5V @ 25°C. Input-to-tap delays accurate on both rising and falling edges within ±2 ns or ±5%
whichever is greater.
4. See “Test Conditions” section.
5. For DS1010 delay lines with a TAP 10 delay of 100 ns or greater, temperature variations from 25
°C
to 0
°C or 70°C may produce an additional input-to-tap delay shift of ±2ns or ±3%, whichever is
greater.
6. For DS1010 delay lines with a TAP 10 delay less than 100 ns, temperature variations from 25
°C to
0
°C or 70°C may produce an additional input-to-tap delay shift of ±1 ns or ±9%, whichever is greater.
7. All tap delays tend to vary unidirectionally with temperature or voltage changes. For example, if TAP
1 slows down, all other taps will also slow down; TAP 3 can never be faster than TAP 2.
8. Pulse width and period specifications may be exceeded; however, accuracy will be application-
sensitive (decoupling, layout, etc.).
9. Certain high-frequency applications not recommended for -50 in 16-pin package. Consult factory.
TIMING DIAGRAM: SILICON DELAY LINE Figure 2
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS1010S-75 | 功能描述:延迟线/计时元素 RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 传播延迟时间:1000 ps 工作温度范围: 封装 / 箱体:QFN-24 封装:Tube |
| DS1010S-75/T&R | 功能描述:延迟线/计时元素 RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 传播延迟时间:1000 ps 工作温度范围: 封装 / 箱体:QFN-24 封装:Tube |
| DS1010S-80 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Tapped Delay Line |
| DS-1011 | 制造商:Molex 功能描述: |
| DS10-12B | 制造商:TRANSMISSION DEVELOPMENTS 功能描述:MOULDED SPUR GEAR 1.0, 12 |
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