参数资料
型号: DS1100LU-125
厂商: DALLAS SEMICONDUCTOR
元件分类: Delay Line
英文描述: SILICON DELAY LINE, TRUE OUTPUT, PDSO8
封装: MICRO, SOP-8
文件页数: 4/6页
文件大小: 57K
代理商: DS1100LU-125
DS1100L
4 of 6
NOTES:
1. Initial tolerances are ± with respect to the nominal value at 25°C and VCC = 3.3 volts for both leading
and trailing edge.
2. T & V tolerance is with respect to the actual measured (at 25° C and 3.3V) delay value over the stated
temperature range, and a supply voltage range of 2.7V to 3.6V.
3. All tap delays tend to vary unidirectionally with temperature or voltage changes. For example, if TAP
1 slows down, all other taps also slow down; TAP3 can never be faster than TAP2.
4. Intermediate delay values are available on a custom basis. For further information, call
(972) 371-4348.
5. All voltages are referenced to ground.
6. Measured with outputs open.
7. See “Test Conditions” section at the end of this data sheet.
8. ICC values apply to a -20 operating at 1MHz. Longer delays will consume less current.
TESTCIRCUIT Figure 3
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