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| 型号： | DS1100LZ-60 |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 4/7页 |
| 文件大小： | 0K |
| 描述： | IC DELAY LINE 5TAP 60NS 8-SOIC |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 100 |
| 标片/步级数： | 5 |
| 功能： | 不可编程 |
| 延迟到第一抽头： | 12ns |
| 接头增量： | 12ns |
| 可用的总延迟： | 60ns |
| 独立延迟数： | 1 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 管件 |
DS1100L
4 of 7
TERMINOLOGY
Period: The time elapsed between the leading edge of the first pulse and the leading edge of the
following pulse.
tWI (Pulse Width): The elapsed time on the pulse between the 1.5V point on the leading edge and the
1.5V point on the trailing edge or the 1.5V point on the trailing edge and the 1.5V point on the leading
edge.
tRISE (Input Rise Time): The elapsed time between the 20% and the 80% point on the leading edge of the
input pulse.
tFALL (Input Fall Time): The elapsed time between the 80% and the 20% point on the trailing edge of the
input pulse.
tPLH (Time Delay, Rising): The elapsed time between the 1.5V point on the leading edge of the input
pulse and the 1.5V point on the leading edge of any tap output pulse.
tPHL (Time Delay, Falling): The elapsed time between the 1.5V point on the trailing edge of the input
pulse and the 1.5V point on the trailing edge of any tap output pulse.
TEST SETUP DESCRIPTION
Figure 3 illustrates the hardware configuration used for measuring the timing parameters on the
DS1100L. The input waveform is produced by a precision pulse generator under software control. Time
delays are measured by a time interval counter (20ps resolution) connected between the input and each
tap. Each tap is selected and connected to the counter by a VHF switch control unit. All measurements
are fully automated, with each instrument controlled by a central computer over an IEEE 488 bus.
TEST CONDITIONS INPUT:
Ambient Temperature:
25°C
±3°C
Supply Voltage (VCC):
3.3V
±0.1V
Input Pulse:
High = 3.0V
±0.1V
Low = 0.0V
±0.1V
Source Impedance:
50
max
Rise and Fall Time:
3.0ns max (measured between 10% and 90%)
Pulse Width:
500ns (1μs for -500 version)
Period:
1μs (2μs for -500 version)
OUTPUT:
Each output is loaded with the equivalent of one 74F04 input gate. Delay is measured at the 1.5V level on
the rising and falling edge.
Note: Above conditions are for test only and do not restrict the operation of the device under other
data sheet conditions.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS1100LZ-60/T&R | 制造商:Maxim Integrated Products 功能描述:IC DELAY LINE 5TAP 60NS 8SOIC |
| DS1100LZ-60/T&R | 功能描述:延迟线/计时元素 3V 5-Tap Delay Line RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 传播延迟时间:1000 ps 工作温度范围: 封装 / 箱体:QFN-24 封装:Tube |
| DS1100LZ-60+ | 功能描述:延迟线/计时元素 3V 5-Tap Delay Line RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 传播延迟时间:1000 ps 工作温度范围: 封装 / 箱体:QFN-24 封装:Tube |
| DS1100LZ-60+T | 功能描述:延迟线/计时元素 3V 5-Tap Delay Line RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 传播延迟时间:1000 ps 工作温度范围: 封装 / 箱体:QFN-24 封装:Tube |
| DS1100LZ60N | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Industrial Control IC |
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