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参数资料
| 型号： | DS1100M-75 |
| 厂商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分类： | Delay Line |
| 英文描述： | SILICON DELAY LINE, TRUE OUTPUT, PDIP8 |
| 封装： | 0.300 INCH, DIP-8 |
| 文件页数： | 3/6页 |
| 文件大小： | 154K |
| 代理商： | DS1100M-75 |
DS1100
3 of 6
ABSOLUTE MAXIMUM RATINGS*
Voltage on Any Pin Relative to Ground
-0.5V to +6.0V
Operating Temperature Range
-40°C to +85°C
Storage Temperature Range
-55°C to +125°C
Soldering Temperature
See IPC/JEDEC J-STD-020A Specification
Short-Circuit Output Current
50mA for 1s
*This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operation sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect reliability.
DC ELECTRICAL CHARACTERISTICS (VCC = 5.0V ±5%, TA = -40°C to +85°C.)
PARAMETER
SYM
TEST CONDITION
MIN
TYP
MAX
UNITS
NOTES
Supply Voltage
VCC
4.75
5.00
5.25
V
5
High-Level
Input Voltage
VIH
2.2
VCC +
0.3
V5
Low-Level
Input Voltage
VIL
-0.3
0.8
V
5
Input-Leakage
Current
II
0.0V
VI VCC
-1.0
1.0
A
Active Current
ICC
VCC = Max; Freq = 1MHz
30
50
mA
6, 8
High-Level
Output Current
IOH
VCC = Min; VOH = 4
-1
mA
Low-Level
Output Current
IOL
VCC = Min; VOL = 0.5
12
mA
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0V ±5%, TA = -40°C to +85°C.)
PARAMETER
SYM
TEST CONDITION
MIN
TYP
MAX UNITS
NOTES
Input
Pulse Width
tWI
20% of
Tap 5
tPLH
ns
9
+25°C 5V
-2
Table 1
+2
ns
1, 3, 4, 7
0°C to +70°C
-3
Table 1
+3
ns
1, 2, 3, 4, 7
Input-to-Tap
Delay Tolerance
(Delays
40ns)
tPLH,
tPHL
-40°C to +85°C
-4
Table 1
+4
ns
1, 2, 3, 4, 7
+25°C 5V
-5
Table 1
+5
%
1, 3, 4, 7
0°C to +70°C
-8
Table 1
+8
%
1, 2, 3, 4, 7
Input-to-Tap
Delay Tolerance
(Delays > 40ns)
tPLH,
tPHL
-40°C to +85°C
-13
Table 1
+13
%
1, 2, 3, 4, 7
Power-Up Time
tPU
200
s
Input Period
Period
2(tWI)ns
9
CAPACITANCE
(TA = +25°C)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Input Capacitance
CIN
510
pF
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