参数资料
型号: DS1212Q
厂商: Maxim Integrated
文件页数: 2/7页
文件大小: 0K
描述: IC CONTROLLER NV 16-CHIP 28-PLCC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 37
控制器类型: 非易失性 RAM
电源电压: 4.75 V ~ 5.5 V
工作温度: 0°C ~ 70°C
封装/外壳: 28-LCC(J 形引线)
供应商设备封装: 28-PLCC(11.51x11.51)
包装: 管件
DS1212
2 of 7
By combining the DS1212 Nonvolatile Controller chip and lithium batteries, nonvolatile RAM operation
can be achieved for up to 16 CMOS memories.
OPERATION
The DS1212 performs six circuit functions required to decode and battery back up a bank of up to 16
RAMs. First, the 4-to-16 decoder provides selection of one of 16 RAMs. Second, a switch is provided to
direct power from the battery or VCCI supply, depending on which is greater. This switch has a voltage
drop of less than 0.2V. The third function the DS1212 provides is power-fail detection. It constantly
monitors the VCCI supply. When VCCI falls below 4.75 volts or 4.5 volts, depending on the level of
tolerance Pin 3, a precision comparator outputs a power-fail detect signal to the decoder/chip enable logic
and the PF signal is driven low. The PF signal will remain low until VCCI is back in normal limits.
The fourth function of write protection is accomplished by holding all chip enable outputs ( CE0 - CE15 ) to
within 0.2 volts of VCCI or battery supply. If CE is low at the time power fail detection occurs, the chip
enable outputs are kept in their present state until CE is driven high. The delay of write protection until
the current memory cycle is completed prevents corruption of data. Power-fail detection occurs in the
range of 4.75 volts to 4.5 volts with tolerance Pin 3 grounded. If Pin 3 is connected to VCCO, then power-
fail occurs in the range of 4.5 volts to 4.25 volts. During nominal supply conditions the chip enable
outputs follow the logic of a 4-to-16 decoder, shown in Figure 1.
The fifth function the DS1212 performs is a battery status warning so that data loss is avoided. Each time
the circuit is powered up, the battery voltage is checked with a precision comparator. If the battery
voltage is less than 2 volts, the second memory cycle is inhibited. Battery status can, therefore, be
determined by performing a read cycle after power-up to any location in memory, verifying that memory
location content. A subsequent write cycle can then be executed to the same memory location, altering the
data. If the next read cycle fails to verify the written data, then the batteries are less than 2.0 volts and
data is in danger of being corrupted.
The sixth function of the DS1212 provides for battery redundancy. In many applications, data integrity is
paramount.
In these applications it is often desirable to use two batteries to ensure reliability. The
DS1212 provides an internal isolation switch which allows the connection of two batteries during battery
backup operation. The battery with the highest voltage is selected for use. If one battery should fail, the
other will then assume the load. The switch to a redundant battery is transparent to circuit operation and
the user. A battery status warning will only occur if both batteries are less than 2.0 volts. For single
battery applications the unused battery input must be grounded.
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