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参数资料
| 型号： | DS1215 |
| 厂商： | DALLAS SEMICONDUCTOR |
| 元件分类： | XO, clock |
| 英文描述： | Using the Dallas Phantom Real Time Clocks(实时时钟芯片) |
| 中文描述： | 0 TIMER(S), REAL TIME CLOCK, PDIP16 |
| 文件页数： | 3/13页 |
| 文件大小： | 64K |
| 代理商： | DS1215 |
APPLICATION NOTE 52
022394 3/13
result, the chip enable logic will force CEO low when
power fails. The real time clock does retain the same
internal nonvolatility and write protection as described in
the RAM mode.
Real Time Clock Operation
The block diagram of Figure 3 illustrates the main ele-
ments of the Phantom Clock. Communication with the
Phantom Clock is established by pattern recognition of
a serial bit stream of 64 bits which must be matched by
executing 64 consecutive write cycles containing the
proper write data as shown in Figure 4. All accesses
which occur prior to recognition of the 64–bit pattern are
directed to memory via the chip enable output pin
(CEO). After recognition is established, the next 64
read or write cycles either extract or update data in the
Phantom Clock and CEO remains high during this time,
disabling the connected memory.
Data transfer to and from the Phantom Clock is accom-
plished with a serial bit stream under the control of chip
enable input (CEI), output enable (OE), and write
enable (WE). Initially, a read cycle using the CEI and OE
control of the Phantom Clock starts the pattern recogni-
tion sequence by moving a pointer to the first bit of the
64–bit comparison register. Next, 64 consecutive write
cycles are executed using the CEI and WE control of the
Phantom Clock. These 64 write cycles are used only to
gain access to the Phantom Clock. However, the write
cycles generated to gain access to the Phantom Clock
are also writing data to a location in the mated RAM.
The preferred way to manage this requirement is to set
aside just one address location in RAM as a scratch pad
for the Phantom Clock.
When the first write cycle is executed, it is compared to
bit 0 of the 64–bit comparison register. If a match is
found, the pointer increments to the next location of the
comparison register and awaits the next write cycle. If a
match is not found, the pointer does not advance and all
subsequent write cycles are ignored until a read cycle is
encountered which resets the comparison register
pointer to the beginning of the 64–bit comparison reg-
ister. If a read cycle occurs at any time during the pat-
tern recognition process, the present sequence is
aborted and the comparison register pointer is reset.
Pattern recognition continues for a total of 64 write
cycles as described above until all the bits in the com-
parison register have been matched (this bit pattern is
shown in Figure 4). With a correct match of the 64 bits,
the Phantom Clock is enabled and data transfer to or
from the timekeeping registers can proceed.
The next 64 cycles will cause the Phantom Clock to
either receive or transmit data, depending on the level of
the OE pin or the WE pin. Data will either be written to or
read from the eight Phantom Clock registers shown in
Figure 5. Cycles to other locations outside the memory
block can be interleaved with CE cycles without inter-
rupting the pattern recognition sequence or data trans-
fer sequence to the Phantom Clock.
Figure 6 offers an example of pseudo code for both
accessing the Phantom Clock embedded in a RAM
through pattern recognition and interfacing with the
clock registers. Another source code example is given
in Figure 7. This code is used for interfacing with the
8051 microcontroller. Also, refer to the data book for
timing diagrams for both read and write cycles.
Interfacing the Phantom Time Clock with a ROM is
somewhat different from that of a RAM. This is due to
the fact that no writes are made to a ROM. Since there
are no WE or data in signals associated with the ROM,
the Phantom Time Clock instead uses two address lines
to access the real time clock as can be seen in Figure 2.
In summary, the operation of the Phantom Clocks is
best defined as operating in two different modes. The
first being the pattern match mode. In this mode, the
Phantom Clock is transparent to the system yet moni-
tors communication to the RAM waiting for a match of
it’s 64–bit access pattern. When the 64–bit access pat-
tern has been written, the Phantom Clocks enter the
clock access mode. In this mode, the eight phantom
clock registers are available to be written or read and will
stay in this mode until all eight registers have been
accessed, until a reset has been executed, or until a
power fail.
TROUBLESHOOTING
The Dallas Phantom Real Time Clocks have proven to
be highly reliable and meet the published specifications.
However, in the course of development, several com-
mon difficulties could be experienced. To reduce these
difficulties, Dallas Semiconductor has gathered the
common difficulties and pitfalls into a troubleshooting
guide to assist users.
相关PDF资料 |
PDF描述 |
|---|---|
| DS1216B | SmartWatch/RAM 16K/64K(16K/64K位带实时时钟的掉电保护RAM插座) |
| DS1216C | SmartWatch/RAM 16K/65K(16K/65K位带实时时钟的掉电保护RAM插座) |
| DS1216D(中文) | Using the Dallas Phantom Real Time Clocks(256K/1M位带实时时钟的带掉电保护SRAM插座) |
| DS1216D | Using the Dallas Phantom Real Time Clocks(256K/1M位带实时时钟的带掉电保护SRAM插座) |
| DS1216E | SmartWatch/RAM 16K/66K(16K/66K带实时时钟的ROM或掉电保护RAM插座) |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS1215G | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Peripheral IC |
| DS1215GN | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Peripheral IC |
| DS-1215ZJ | 制造商:Hikvision USA 功能描述:Camera Pole Mount Plate7.64In X 4.61In X 3.94In 制造商:HIKVISION 功能描述:CAMERA POLE MOUNT PLATE 7.64IN X 4.61IN X 3.94IN |
| DS1216 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:SmartWatch RAM (DS1216B/C/D/H); SmartWatch ROM (DS1216E/F) |
| DS1216B | 功能描述:存储器控制器 SmartWatch RAM RoHS:否 制造商:Maxim Integrated |
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