- 您现在的位置：买卖IC网 > PDF目录381717 > DS1234 (DALLAS SEMICONDUCTOR) Conditional Nonvolatile Controller Chip(条件非易失性控制芯片) PDF资料下载
参数资料
| 型号： | DS1234 |
| 厂商： | DALLAS SEMICONDUCTOR |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | Conditional Nonvolatile Controller Chip(条件非易失性控制芯片) |
| 中文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PDIP14 |
| 封装： | 0.300 INCH, DIP-14 |
| 文件页数： | 2/7页 |
| 文件大小： | 72K |
| 代理商： | DS1234 |
DS1234
021798 2/7
OPERATION
The DS1234 Conditional Nonvolatile Controller per-
forms three circuit functions required to battery back up
a RAM. First, a switch is provided to direct power from
the battery or the incoming supply (V
CCI
), depending on
which is greater. This switch has a voltage drop of less
than 0.2V. The second function is power fail detection.
The DS1234 constantly monitors the incoming supply.
When the supply goes out-of-tolerance, a comparator
detects power fail and inhibits chip enable and write en-
able. The threshold voltage, V
TP
, at which power fail is
detected is defined as 1.26 times V
BAT
. The third func-
tion of write protection is accomplished by holding the
CEO and WEO output signals to within 0.2 volts of the
V
CCI
or battery supply.
In addition to the nonvolatile controller functions, the
DS1234 supplies two software-selectable switches for
master control of the write enable and the nonvolatile
controller itself. The switches are controlled by a
16-cycle pattern recognition sequence across four ad-
dress lines (see Tables 1 and 2). Prior to entering the
pattern recognition sequence that will define the two
switch settings, a read cycle of 1111 on address inputs
A0 through A3 should be executed to initialize the com-
pare pointer of clock zero. Each four-bit compare word
is clocked into the DS1234 on the negative edge of CEI.
A0, A1 and A2 must match the compare pattern on all 16
consecutive cycles while A3 must match only the first
eleven; the last five are used to define the switch set-
tings. The eleventh address cycle, starting at zero, de-
fines the switch that inhibits the write enable to the RAM
(WEO). A logic one in this location allows read/write op-
erations so that WEO will follow WEI and data can be
updated. A zero on cycle eleven turns the RAM into a
read-only memory (ROM). The next four address
cycles, 12 thorough 15, define whether the nonvolatile
controller operation is enabled or disabled. A bit pattern
of 1010 activates the nonvolatile controller; data in the
RAM is maintained on power loss. Any pattern other
than 1010 will disable the nonvolatile controller opera-
tion.
At the completion of the 16th cycle, if the pattern recog-
nition sequence is correct, the switch settings defined in
cycles 11 though 15 are transferred and are active for
the next memory cycle. When external battery power is
applied for the first time, the DS1234 will come up with
the nonvolatile controller off. Upon initial V
CC
power, the
write enable will be set in read/write operation
(WEI=WEO).
CONTROLLER TO MEMORY INTERFACE
Figure 1
V
CC
CE
WE
A
N
A
3
A
2
A
1
A
0
CMOS
RAM
1
5
6
8
13
V
CCO
CEO
WEO
PF
To write protect oth-
er memories
V
BAT
+
DS1234
+5V
3
4
9
14
12
11
10
V
CCI
CEI
WEI
A
3
A
2
A
1
A
0
From Decoder
CE
WE
4
N
Address
Bus
相关PDF资料 |
PDF描述 |
|---|---|
| DS1236A | MicroManager Chip(微管理器芯片) |
| DS1236 | MicroManager Chip(微管理器芯片) |
| DS1238A | MicroManager(微管理器芯片) |
| DS1238 | MicroManager(微管理器芯片) |
| DS1239 | MicroManager Chip(微管理器芯片) |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS-1234ZJ | 制造商:Hikvision USA 功能描述:LOW VOLTAGE CEILING BRACKETSINGLE GANG; 4.72IN X 0.35IN 制造商:HIKVISION 功能描述:LOW VOLTAGE CEILING BRACKET SINGLE GANG; 4.72IN X 0.35IN |
| DS1235AB | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:256K Nonvolatille SRAM |
| DS1235AB-120 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:NVRAM (Battery Based) |
| DS1235AB-150 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:NVRAM (Battery Based) |
| DS1235AB-200 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:NVRAM (Battery Based) |
发布紧急采购，3分钟左右您将得到回复。