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参数资料
| 型号： | DS1244WP-120IND |
| 英文描述： | 256k NV SRAM with Phantom Clock |
| 中文描述： | 256k非易失SRAM与幻影时钟 |
| 文件页数： | 14/19页 |
| 文件大小： | 292K |
| 代理商： | DS1244WP-120IND |
ADS1244
SBAS273
14
www.ti.com
SINGLE-SUPPLY OPERATION
It is possible to operate the ADS1244 with a single supply.
For a 3V supply, simply connect AVDD and DVDD together.
Figure 17 shows an example of the ADS1244 running on a
single 5V supply. An external resistor, R1, is used to drop 5V
supply down to a desired voltage level of DVDD. For ex-
ample, if the desired DVDD supply voltage is 3V and AVDD
is 5V, the value of R1 should be:
R1 = (5V
–
3V)/4.5
μ
A
≈
440k
where 4.5
μ
A is a typical digital current consumption when
DVDD = 3V (refer to the typical characteristic
“
Digital Current
vs Digital Supply
”
). A buffer on
DRDY/DOUT
can provide
level-shifting if required.
DVDD can be set to a desired voltage by choosing a proper
value of R1, but keep in mind that DVDD must be set
between 1.8V and 3.6V. Note that the maximum logic HIGH
output of
DRDY/DOUT
is equal to DVDD, but both CLK and
SCLK inputs can be driven with 5V logic regardless of the
DVDD or AVDD voltage. Use 0.1
μ
F capacitors to bypass
both AVDD and DVDD.
MULTICHANNEL SYSTEMS
Multiple ADS1244s can be operated in parallel to measure
multiple input signals. Figure 18 shows an example of a
2-channel system. For simplicity, the supplies and reference
circuitry were not included. The same CLK signal should be
applied to all devices. To be able to synchronize the
ADS1244s, connect the same SCLK signal to all devices as
well. When ready to synchronize, place all the devices in
Sleep Mode. Afterwards,
“
wakeup
”
and all the ADS1244s will
be synchronized. That is, they will sample the input signals
simultaneously.
The
DRDY/DOUT
outputs will go LOW at approximately the
same time after synchronization. The falling edges indicating
that new data is ready will vary with respect to each other no
more than timing specification t
14
. This variation is due to
posible differences in the ADS1244
’
s internal calibration
settings. To account for this when using multiple devices,
either wait for t
14
to pass after seeing one device
’
s
DRDY/DOUT
go LOW, or wait until all
DRDY/DOUT
s have
gone LOW before retrieving data.
FIGURE 18. Example of Using Multiple ADS1244s in Parallel.
1
2
3
4
5
10
9
8
7
6
CLK
SCLK
DRDY/DOUT
DVDD
AVDD
GND
VREFP
VREFN
AINN
AINP
ADS1244
IN1
OUT1
1
2
3
4
5
10
9
8
7
6
CLK
SCLK
DRDY/DOUT
DVDD
AVDD
GND
VREFP
VREFN
AINN
AINP
ADS1244
IN2
OUT2
CLK and SCLK
Sources
OUT1
OUT2
t
14
FIGURE 17. Example of the ADS1244 Running on a Single
5V Supply.
10
9
8
7
6
1
2
3
4
5
CLK
SCLK
DRDY/DOUT
DVDD
AVDD
GND
VREFP
VREFN
AINN
AINP
ADS1244
R1
0.1
μ
F
+
+5V
to +5V logic
from
+5V logic
from
+5V logic
0.1
μ
F
+
SN74LVCC3245A
SYMBOL
DESCRIPTION
MIN
MAX
UNITS
t
14
Difference between
DRDY/DOUT
s
going LOW in multichannel systems.
±
500
μ
s
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PDF描述 |
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| DS1244Y-70 | 256k NV SRAM with Phantom Clock |
| DS1244W-120 | 256k NV SRAM with Phantom Clock |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS1244WP-120IND+ | 功能描述:实时时钟 256k NV SRAM w/Phantom Clock RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| DS1244Y | 制造商:Maxim Integrated Products 功能描述: 制造商:Maxim Integrated Products 功能描述:Real Time Clock, Non-Volatile, 28 Pin, Plastic, DIP |
| DS1244Y120 | 制造商:Maxim Integrated Products 功能描述: |
| DS1244Y-120 | 制造商:Maxim Integrated Products 功能描述: |
| DS1244Y-150 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
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