参数资料
型号: DS1267E-100+T&R
厂商: Maxim Integrated Products
文件页数: 12/12页
文件大小: 0K
描述: IC POT DUAL DIGITAL 100K 20TSSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
接片: 256
电阻(欧姆): 100k
电路数: 2
温度系数: 标准值 750 ppm/°C
存储器类型: 易失
接口: 3 线串口
电源电压: 4.5 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 20-TSSOP
包装: 带卷 (TR)
DS1267
9 of 12
102199
ANALOG RESISTOR CHARACTERISTICS (-40
°C to +85°C; V
CC = 5.0V ± 10%)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
End-to-End Resistor Tolerance
-20
+20
%
10
Absolute Linearity
±.75
LDB
3
Relative Linearity
±0.3
LDB
4
-3 dB Cutoff Frequency
FCUTOFF
Hz
6
Temperature Coefficient
750
ppm/C
CAPACITANCE
(TA=25
°C)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Input Capacitance
CIN
5
pF
Output Capacitance
COUT
7
pF
AC ELECTRICAL CHARACTERISTICS
(-40
°C to +85°C; V
CC = 5.0V ± 10%)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
CLK Frequency
fCLK
DC
10
MHz
8
Width of CLK Pulse
tCH
50
ns
8
Data Setup Time
tDC
30
ns
8
Data Hold Time
tCDH
10
ns
8
Propagation Delay Time Low to
High Level Clock to Output
tPLH
50
ns
8
Propagation Delay Time High to
Low Level
tPHL
50
ns
8
RST
High to Clock Input High
tCC
50
ns
8
RST
Low to Clock Input High
tHLT
50
ns
8
RST
Inactive
tRLT
125
ns
8
CLK Rise Time, CLK Fall Time
tCR
50
ns
8
NOTES:
1. All voltages are referenced to ground.
2. Resistor inputs cannot exceed the substrate bias voltage, Vb, in the negative direction.
3. Absolute linearity is used to determine wiper voltage versus expected voltage as determined by wiper
position. Device test limits ±1.6 LSB.
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