参数资料
型号: DS1305EN/T&R
厂商: Maxim Integrated Products
文件页数: 16/22页
文件大小: 0K
描述: IC RTC SERIAL ALARM IND 20-TSSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 时钟/日历
特点: 警报器,闰年,NVSRAM,涓流充电器
存储容量: 96B
时间格式: HH:MM:SS(12/24 小时)
数据格式: YY-MM-DD-dd
接口: SPI
电源电压: 2 V ~ 5.5 V
电压 - 电源,电池: 2 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 20-TSSOP
包装: 带卷 (TR)
DS1305
3 of 22
PIN DESCRIPTION
PIN
DIP
TSSOP
NAME
FUNCTION
1
VCC2
Backup Power Supply. This is the secondary power supply pin. In systems
using the trickle charger, the rechargeable energy source is connected to this
pin.
2
VBAT
Battery Input for Standard +3V Lithium Cell or Other Energy Source. If not
used, VBAT must be connect to ground. Diodes must not be placed in series
between VBAT and the battery, or improper operation will result. UL
recognized to ensure against reverse charging current when used in
conjunction with a lithium battery. See “Conditions of Acceptability” at
www.maxim-ic.com/TechSupport/QA/ntrl.htm.
3
X1
4
5
X2
Connections for Standard 32.768kHz Quartz Crystal. The internal oscillator is
designed for operation with a crystal having a specified load capacitance of
6pF. For more information on crystal selection and crystal layout
considerations, refer to Application Note 58: Crystal Considerations with
Dallas Real-Time Clocks. The DS1305 can also be driven by an external
32.768kHz oscillator. In this configuration, the X1 pin is connected to the
external oscillator signal and the X2 pin is floated.
5
4, 6, 8,
13, 19
N.C.
No Connection
6
7
INT0
Active-Low Interrupt 0 Output. The
INT0 pin is an active-low output of the
DS1305 that can be used as an interrupt input to a processor. The
INT0 pin
can be programmed to be asserted by only Alarm 0 or can be programmed to
be asserted by either Alarm 0 or Alarm 1. The
INT0 pin remains low as long
as the status bit causing the interrupt is present and the corresponding interrupt
enable bit is set. The
INT0 pin operates when the DS1305 is powered by VCC1,
VCC2, or VBAT. The INT0 pin is an open-drain output and requires an external
pullup resistor.
7
9
INT1
Active-Low Interrupt 1 Output. The
INT1 pin is an active-low output of the
DS1305 that can be used as an interrupt input to a processor. The
INT1 pin
can be programmed to be asserted by Alarm 1 only. The
INT1 pin remains
low as long as the status bit causing the interrupt is present and the
corresponding interrupt enable bit is set. The
INT1 pin operates when the
DS1305 is powered by VCC1, VCC2, or VBAT. The INT1 pin is an open-drain
output and requires an external pullup resistor. Both
INT0 and INT1 are open-
drain outputs. The two interrupts and the internal clock continue to run
regardless of the level of VCC (as long as a power source is present).
8
10
GND
Ground
9
11
SERMODE
Serial Interface Mode. The SERMODE pin offers the flexibility to choose
between two serial interface modes. When connected to GND, standard 3-wire
communication is selected. When connected to VCC, SPI communication is
selected.
10
12
CE
Chip Enable. The chip-enable signal must be asserted high during a read or a
write for both 3-wire and SPI communication. This pin has an internal 55k
pulldown resistor (typical).
11
14
SCLK
Serial Clock Input. SCLK is used to synchronize data movement on the serial
interface for either the SPI or 3-wire interface.
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