参数资料
型号: DS1344D-33+
厂商: Maxim Integrated Products
文件页数: 6/20页
文件大小: 0K
描述: IC RTC SPI 3.3V 14TDFN-EP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 100
类型: 时钟/日历
特点: 警报器,闰年,NVRAM,方波输出,涓流充电器
存储容量: 96B
时间格式: HH:MM:SS(12/24 小时)
数据格式: YY-MM-DD-dd
接口: SPI
电源电压: 3 V ~ 5.5 V
电压 - 电源,电池: 1.3 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 14-WFDFN 裸露焊盘
供应商设备封装: 14-TDFN-EP(3x3)
包装: 管件
14
Maxim Integrated
Low-Current SPI/3-Wire RTCs
DS1343/DS1344
Status Register (10h)
Trickle Charger Register (11h)
Register 11h controls the devices’ trickle-charge char-
acteristics. The simplified schematic of Figure 2 shows
the basic components of the trickle charger. The trickle-
charge select (TCS[3:0]) bits (bits 7:4) control the
selection of the trickle charger. To prevent accidental
enabling, only a pattern of 1010 enables the trickle
charger; all other patterns disable the trickle charger.
On the initial application of power, the devices power
up with the trickle charger disabled. The diode-select
(DS[1:0]) bits (bits 3:2) select whether or not a diode is
connected between VCC and VBAT. The resistor-select
(RS[1:0]) bits (bits 1:0) select the resistor that is con-
nected between VCC and VBAT. The RS and DS bits
select the resistor and diodes, as shown in Table 3. The
user determines diode and resistor selection according
to the maximum current desired for secondary battery or
super cap charging. The maximum charging current can
be calculated using the equation that follows.
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
OSF
0
IRQF1
IRQF0
1
0
BIT 7
OSF: Oscillator stop flag. If the OSF bit is 1, the oscillator either has stopped or was stopped for some period
and could be used to judge the validity of the clock and calendar data. This bit is edge triggered and is set to
1 when the internal circuitry senses the oscillator has transitioned from a normal run state to a stop condition.
This bit remains at logic 1 until written to logic 0. Attempting to write OSF to 1 leaves the value unchanged.
The following are examples of conditions that can cause the OSF bit to be set:
1) The first time power is applied.
2) The voltage present on VCC is insufficient to support oscillation.
3) The EOSC bit is a logic one during battery backup.
4) External influences on the crystal (i.e., noise, leakage, etc.).
BIT 1
IRQF1: Interrupt request 1 flag. A logic 1 in the IRQF1 bit indicates that the time matched the Alarm 1 reg-
isters. This flag can be used to generate an interrupt on either INT0 or INT1 depending on the status of the
INTCN bit in the Control register. If the INTCN bit is 0 and IRQF1 is 1 (and the A1IE bit is also 1), INT0 goes
low. If the INTCN bit is 1 and IRQF1 is 1 (and the A1IE bit is also 1), INT1 goes low. IRQF1 is cleared when
the address pointer is set to any of the Alarm 1 registers during an I/O transaction. The IRQF1 bit can also
be cleared by writing it to 0. This bit can only be written to 0. Attempting to write the IRQF1 bit to 1 leaves the
value unchanged.
BIT 0
IRQF0: Interrupt request 0 flag. A logic 1 in the IRQF0 bit indicates that the time matched the Alarm 0 regis-
ters. If the A0IE bit is also 1, INT0 goes low. IRQF0 is cleared when the address pointer is set to any of the
Alarm 0 registers during an I/O transaction. The IRQF0 bit can also be cleared by writing it to 0. This bit can
only be written to 0. Attempting to write the IRQF0 bit to 1 leaves the value unchanged.
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
TCS3
TCS2
TCS1
TCS0
DS1
DS0
RS1
RS0
0
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