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参数资料
| 型号： | DS1553 |
| 厂商： | Maxim Integrated Products, Inc. |
| 英文描述： | 64K NV Y2KC Timekeeping RAM(64K非易失性Y2KC 计时 RAM) |
| 中文描述： | 64kB、非易失、Y2K兼容时钟RAM |
| 文件页数： | 7/19页 |
| 文件大小： | 165K |
| 代理商： | DS1553 |
DS1553
070198 7/19
The IRQ/FT pin can also be activated in the battery
backed–up mode. The IRQ/FT will go low if an alarm
occurs and both ABE and AE are set. The ABE and AE
bits are cleared during the power–up transition, how-
ever an alarm generated during power–up will set AF.
Therefore the AF bit can be read after system power–up
to determine if an alarm was generated during the pow-
er–up sequence. Figure 4 illustrates alarm timing dur-
ing the battery back–up mode and power–up states.
BACK–UP MODE ALARM WAVEFORMS
Figure 4
V
CC
ABE, AE
AF
IRQ/FT
V
PF(max)
V
PF(min)
HIGH–Z
HIGH–Z
USING THE WATCHDOG TIMER
The watchdog timer can be used to detect an out–of–
control processor. The user programs the watchdog
timer by setting the desired amount of time–out into the
eight bit Watchdog Register (Address 1FF7h). The five
Watchdog Register bits BMB4–BMB0 store a binary
multiplier and the two lower order bits RB1–RB0 select
the resolution, where 00=1/16 second, 01=1/4 second,
10=1 second, and 11=4 seconds. The watchdog time–
out value is then determined by the multiplication of the
five bit multiplier value with the two bit resolution value.
(For example: writing 00001110 in the watchdog Regis-
ter = 3 X 1 second or 3 seconds). If the processor does
not reset the timer within the specified period, the
Watchdog Flag (WF) is set and a processor interrupt is
generated and stays active until either the Watchdog
Flag (WF) is read or the watchdog register (1FF7) is
read or written.
The most significant bit of the Watchdog Register is the
Watchdog Steering Bit (WDS). When set to a “0”, the
watchdog will activate the IRQ/FT output when the
watchdog times out.
When WDS is set to a “1”, the watchdog will output a
negative pulse on the RST output for a duration of 40ms
to 200 ms. The Watchdog register (1FF7) and the FT bit
will reset to a at the end of a watchdog time–out when
the WDS bit is set to a “1”.
The watchdog timer resets when the processor per-
forms a read or write of the Watchdog register. The
time–out period then starts over. The watchdog timer is
disabled by writing a value of 00h to the watchdog regis-
ter. The watchdog function is automatically disabled
upon power–up and the Watchdog register is cleared. If
the watchdog function is set to output to the IRQ/FT out-
put and the frequency test function is activated, the
watchdog function prevails and the frequency test func-
tion is denied.
POWER–ON DEFAULT STATES
Upon application of power to the device, the following
register bits are set to a “0”:
WDS=“0”, BMB0–BMB4=“0”, RB0–RB1=“0”,
AE=“0”, ABE=“0”.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS1553-100 | 功能描述:实时时钟 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| DS1553-100+ | 功能描述:实时时钟 64kB NV RAM Timekeeper RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| DS1553-70 | 功能描述:实时时钟 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| DS1553-70+ | 功能描述:实时时钟 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| DS1553-85+ | 功能描述:实时时钟 64kB NV RAM Timekeeper RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
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