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| 型号： | DS1556WP-120+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 13/18页 |
| 文件大小： | 0K |
| 描述： | IC RTC RAM Y2K 3.3V 120NS 34PCM |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 40 |
| 类型： | 时钟/日历 |
| 特点： | 警报器，闰年，NVSRAM，监视计时器，Y2K |
| 存储容量： | 128KB |
| 时间格式： | HH:MM:SS（24 小时） |
| 数据格式： | YY-MM-DD-dd |
| 接口： | 并联 |
| 电源电压： | 2.97 V ~ 3.63 V |
| 电压 - 电源，电池： | 3V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 34-PowerCap? 模块 |
| 供应商设备封装： | 34-PowerCap 模块 |
| 包装： | 管件 |
DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM
4 of 18
Figure 1. Block Diagram
Table 1. Operating Modes
VCC
CE
OE
WE
DQ0–DQ7
MODE
POWER
VIH
X
High-Z
Deselect
Standby
VIL
X
VIL
DIN
Write
Active
VIL
VIH
DOUT
Read
Active
VCC > VPF
VIL
VIH
High-Z
Read
Active
VSO < VCC <VPF
X
High-Z
Deselect
CMOS Standby
VCC <VSO < VPF
X
High-Z
Data Retention
Battery Current
DATA READ MODE
The DS1556 is in the read mode whenever
CE (chip enable) is low and WE (write enable) is high. The
device architecture allows ripple-through access to any valid address location. Valid data will be available
at the DQ pins within tAA after the last address input is stable, providing that CE and OE access times are
satisfied. If
CE or OE access times are not met, valid data will be available at the latter of chip enable
access (tCEA) or at output enable access time (tOEA). The state of the data input/output pins (DQ) is
controlled by
CE and OE. If the outputs are activated before t
AA, the data lines are driven to an
intermediate state until tAA. If the address inputs are changed while CE and OE remain valid, output data
will remain valid for output data hold time (tOH) but will then go indeterminate until the next address
access.
DATA WRITE MODE
The DS1556 is in the write mode whenever
WE and CE are in their active state. The start of a write is
referenced to the latter occurring transition of
WE or CE. The addresses must be held valid throughout the
cycle.
CE and WE must return inactive for a minimum of t
WR prior to the initiation of a subsequent read
or write cycle. Data in must be valid tDS prior to the end of the write and remain valid for tDH afterward. In
Maxim
DS1556
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS1556WP-120+ | 功能描述:实时时钟 1M NV RAM Timekeeper RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| DS1556WP-120IND | 功能描述:实时时钟 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| DS1556WP-120IND+ | 功能描述:实时时钟 1M NV RAM Timekeeper RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| DS1557 | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:4MEG NV Y2KC Timekeeping RAM |
| DS1557P/YP/WP | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:PowerCap with Crystal |
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