参数资料
型号: DS1558Y+
厂商: Maxim Integrated Products
文件页数: 13/18页
文件大小: 0K
描述: IC RTC W/NV RAM 5V 48-TQFP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 250
类型: 时钟/日历
特点: 警报器,闰年,监视计时器,Y2K
时间格式: HH:MM:SS(24 小时)
数据格式: YY-MM-DD-dd
接口: 并联
电源电压: 4.5 V ~ 5.5 V
电压 - 电源,电池: 2.5 V ~ 3.7 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-LQFP(7x7)
包装: 托盘
产品目录页面: 1434 (CN2011-ZH PDF)
DS1558
4 of 18
D
CR
ON
S1
s
n, year 2000-compliant (Y2KC), real-time clock/calendar with an RTC
alarm, watchdog timer, power-on reset, battery monitor, and NV SRAM controller. User access to all
registers within the DS1558 is accomplished with a byte-wide interface as shown in Figure 1. The RTC
registers contain century, year, month, date, day, hours, minutes, and seconds data in 24-hour BCD
fo
at. Corrections for day of month and leap year are made automatically.
The DS1558 maps the RTC registers into the SRAM address space and constantly monitors A0–A18.
W n any
the
ES
IPTI
The D 558 i a full-functio
rm
he
of
upper 16 address locations are accessed, the DS1558 inhibits CER and OER to the
S
M, an
dir
DS1558 can be used
w
SRA
up
addresses. Smaller SRAMs can be used, provided that the unused upper
address lines on the DS1558 are connected to VCC.
The RTC registers are double-buffered into an internal and external set. The user has direct access to the
external set. Clock/calendar updates to the external set of registers can be disabled and enabled to allow
th
ser to
ess static data. Assuming the internal oscillator is turned on, the internal set of registers is
continuously updated; this occurs regardless of external register settings to guarantee that accurate RTC
in
ation is always maintained.
The DS1558 has interrupt (
RA
d re
ects reads and writes to the RTC registers within the DS1558. The
to 524,272
ith
Ms
e u
acc
form
IRQ
/FT) and reset ( RST ) outputs that can be used to control CPU activity.
The IRQ /
ter
terrupt when the RTC register values
m
h use
grammed alarm values. The interrupt is always available while the device is powered from
th
ystem
ply, and it can be programmed to occur when in the battery-backed state to serve as a
wake-up. The
FT in rupt output can be used to generate an external in
atc
r-pro
e s
sup
system
IRQ
/FT output can also be used as a CPU watchdog timer. CPU activity is
monitored and an interrupt or reset output are activated if the correct activity is not detected within
programm
i
ower-down or failure
and hold the CPU
; the
ed lim ts. The DS1558 power-on reset can be used to detect a system p
in a safe reset state until normal power returns and stabilizes
RST
output is used
for this function.
T
DS155 also
tects the data in the clock
and SRAM against out-of-tolerance V
conditions by inhibiting the
he
8
contains its own power-fail circuitry, which automatically pro
CCI
CE
input when the VCC supply
enters an out-of-tolerance condition. W
T, the external battery is
s
hed
u
ovides a high degree of
data security during unpredictable
CC levels.
hen VCCI goes below the level of VBA
pply energy to the clock and the external SRAM. This feature pr
witc
on to s
system operation brought on by low V
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