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参数资料
| 型号： | DS1644-120+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 10/14页 |
| 文件大小： | 0K |
| 描述： | IC RAM TIMEKEEP NV 120NS 28-EDIP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 12 |
| 类型： | 时钟/日历 |
| 特点： | 闰年，NVSRAM |
| 存储容量： | 32KB |
| 时间格式： | HH:MM:SS（24 小时） |
| 数据格式： | YY-MM-DD-dd |
| 接口： | 并联 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 28-DIP 模块（0.600"，15.24mm） |
| 供应商设备封装： | 28-EDIP |
| 包装： | 管件 |
| 产品目录页面： | 1432 (CN2011-ZH PDF) |
DS1644/DS1644P
5 of 14
DS1644 REGISTER MAP—BANK1 Table 2
DATA
ADDRESS
B7
B6
B5
B4
B3
B2
B1
B0
FUNCTION
7FFF
—
Year
00-99
7FFE
X
—
Month
01-12
7FFD
X
-
—
Date
01-31
7FFC
X
FT
X
—
Day
01-07
7FFB
X
—
Hour
00-23
7FFA
X
—
Minutes
00-59
7FF9
OSC
—
Seconds
00-59
7FF8
W
R
X
Control
A
OSC = STOP BIT
R = READ BIT
FT = FREQUENCY TEST
W = WRITE BIT
X = UNUSED
Note: All indicated “X” bits are unused but must be set to “0” during write cycles to ensure proper clock
operation.
RETRIEVING DATA FROM RAM OR CLOCK
The DS1644 is in the read mode whenever WE (write enable) is high, and CE (chip enable) is low. The
device architecture allows ripple-through access to any of the address locations in the NV SRAM. Valid
data will be available at the DQ pins within tAA after the last address input is stable, providing that the CE
and OE access times and states are satisfied. If CE or OE access times are not met, valid data will be
available at the latter of chip enable access (tCEA) or at output enable access time (tOEA). The state of the
data input/output pins (DQ) is controlled by CE and OE . If the outputs are activated before tAA, the data
lines are driven to an intermediate state until tAA. If the address inputs are changed while CE and OE
remain valid, output data will remain valid for output data hold time (tOH) but will then go indeterminate
until the next address access.
WRITING DATA TO RAM OR CLOCK
The DS1644 is in the write mode whenever WE and CE are in their active state. The start of a write is
referenced to the latter occurring high to low transition of WE or CE . The addresses must be held valid
throughout the cycle. CE or WE must return inactive for a minimum of tWR prior to the initiation of
another read or write cycle. Data in must be valid tDS prior to the end of write and remain valid for tDH
afterward. In a typical application, the OE signal will be high during a write cycle. However, OE can be
active provided that care is taken with the data bus to avoid bus contention. If OE is low prior to WE
transitioning low the data bus can become active with read data defined by the address inputs. A low
transition on WE will then disable the outputs tWEZ after WE goes active.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS1644-120+ | 功能描述:实时时钟 NV Timekeeping RAM RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| DS1644-15 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Real-Time Clock |
| DS1644J | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Quad Clock Driver |
| DS1644L-12 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Real-Time Clock |
| DS1644L-120 | 功能描述:实时时钟 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
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