参数资料
型号: DS1672U-33
厂商: Maxim Integrated Products
文件页数: 15/15页
文件大小: 0K
描述: IC TIMEKEEPER 3.3V 32-BIT 8-USOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
类型: 二进制计数器
特点: 涓流充电器
时间格式: 二进制
数据格式: 二进制
接口: I²C,2 线串口
电源电压: 2.97 V ~ 3.63 V
电压 - 电源,电池: 1.3 V ~ 3.63 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-TSSOP,8-MSOP(0.118",3.00mm 宽)
供应商设备封装: 8-uMAX
包装: 管件
DS1672
9 of 15
trimmed. Additional error will be added by crystal frequency drift caused by temperature shifts. External
circuit noise coupled into the oscillator circuit may result in the clock running fast. Refer to Application
Note 5: “Crystal Considerations with Dallas Real-Time Clocks” for detailed information.
Address Map
The counter is accessed by reading or writing the first 4 bytes of the DS1672 (00h–03h). The control
register and trickle charger are accessed by reading or writing the appropriate register bytes as illustrated
in Table 2. If the master continues to send or request more data after the address pointer has reached 05h,
the address pointer will wrap around to location 00h.
Table 2. Registers
ADDRESS
B7
B6
B5
B4
B3
B2
B1
B0
FUNCTION
00h
LSB
Counter Byte 1
01h
Counter Byte 2
02h
Counter Byte 3
03h
MSB
Counter Byte 4
04h
EOSC
Control
05h
TCS
DS
RS
Trickle Charger
Power Control
The device is fully accessible and data can be written and ready only when VCC is greater than VPF.
However, when VCC falls below V
PF, (point at which write protection occurs) the internal clock registers
are blocked from any access. If VPF is less than VBACKUP, the device power is switched from VCC to
VBACKUP when VCC drops below VPF. If VPF is greater than VBACKUP, the device power is switched from
VCC to VBACKUP when VCC drops below VBACKUP. Oscillator and counter operation are maintained from
the VBACKUP source until VCC is returned to nominal levels (see Table 3).
Table 3. Power Control
SUPPLY CONDITION
READ/WRITE
ACCESS
RST
POWERED BY
VCC < VPF, VCC < VBACKUP
No
Active
VBACKUP
VCC < VPF, VCC > VBACKUP
No
Active
VCC
VCC > VPF, VCC < VBACKUP
Yes
Inactive
VCC
VCC > VPF, VCC > VBACKUP
Yes
Inactive
VCC
Oscillator Control
The
EOSC bit (bit 7 of the control register) controls the oscillator when in back-up mode. This bit when
set to logic 0 will start the oscillator. When this bit is set to a logic 1, the oscillator is stopped and the
DS1672 is placed into a low-power standby mode (IBACKUP) when in back-up mode. When the DS1672 is
powered by VCC, the oscillator is always on regardless of the status of the EOSC bit; however, the counter
is incremented only when
EOSC is a logic 0.
Microprocessor Monitor
A temperature-compensated comparator circuit monitors the level of VCC. When VCC falls to the power-
fail trip point, the
RST signal (open drain) is pulled active, and read/write access is inhibited. When V
CC
returns to nominal levels, the
RST signal is kept in the active state for t
RPU (typically) to allow the power
supply and microprocessor to stabilize. Note, however, that if the
EOSC bit is set to a logic 1 (to disable
the oscillator during write protection), the reset signal will be kept in an active state for tRPU plus the
startup time of the oscillator.
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