参数资料
型号: DS1682
厂商: DALLAS SEMICONDUCTOR
元件分类: Timer or RTC
英文描述: 0 TIMER(S), TIME RECORDER, PDSO8
封装: MICRO, SOP-8
文件页数: 7/13页
文件大小: 77K
代理商: DS1682
DS1682
3 of 13
DS1682 BLOCK DIAGRAM Figure 1
SIGNAL DESCRIPTIONS
The following paragraphs describe the function of each pin.
VCC – VCC is a +3-5 volt input supply. A capacitor or other temporary energy source may be required to
hold the Voltage 150 mS after the event has completed if the system power is removed at the same time
as the event ends in order to allow the contents of the ETC to be stored properly. With less than the
150 mS of power after the end of the event, the data may be lost. The LSB is written first to be sure that
the most likely changed data is saved first.
GND - Ground
SCL (2-wire Serial Clock Input) – The SCL pin is the serial clock input for the 2-wire synchronous
communications channel.
The SCL pin is an open drain input, which requires an external pull–up
resistor.
SDA (2-wire Input/Output) – The SDA pin is the data Input/Output signal for the 2-wire synchronous
communications channel. The SDA pin is an open drain I/O, which requires an external pull–up resistor.
EVENT (Event Interrupt Input) – The Event pin is an input that will be activated by an external device to
signify an event has occurred and should be logged. When the pin is pulled high, the Elapsed Time
Counter (ETC) will begin to keep track of the time with quarter second resolution and when the pin is
pulled low, the contents of the ETC will be stored to the non-volatile Total Time Accumulator register
and the Event Counter register will be incremented. A pull-down resistor has been internally connected
to the Event input to prevent power-up glitches from triggering a false event. The Event input has a
Glitch filter to prevent very short noise spikes from triggering an event. A capacitor or other temporary
energy source may be required to hold the Voltage 150 mS after the event has completed if the system
power is removed at the same time as the event ends in order to allow the contents of the ETC to be
stored properly. With less than the 150 mS of power after the end of the event, the data may be lost. The
LSB is written first to be sure that the most likely changed data is saved first. When the Event pin
changes states, the 2-wire bus will be unavailable for communications for 200 mS.
OSCILLATOR
AND
DIVIDER
CONTROL
LOGIC
ELAPSED TIME COUNTER
AND ACCUMULATOR
REGISTERS
SERIAL
INTERFACE
MEMORY
FUNCTION
CONTROL
EVENT
SDA
SCL
ALARM
相关PDF资料
PDF描述
DS1685-3 1 TIMER(S), REAL TIME CLOCK, PDIP24
DS1687-5 1 TIMER(S), REAL TIME CLOCK, PDIP24
DS1685Q-3 1 TIMER(S), REAL TIME CLOCK, PQCC28
DS1685S-3 1 TIMER(S), REAL TIME CLOCK, PDSO24
DS1685E-5 1 TIMER(S), REAL TIME CLOCK, PDSO24
相关代理商/技术参数
参数描述
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