- 您现在的位置：买卖IC网 > PDF目录237507 > DS1743P-100IND+ (MAXIM INTEGRATED PRODUCTS INC) Y2K-Compliant, Nonvolatile Timekeeping RAMs PDF资料下载
参数资料
| 型号： | DS1743P-100IND+ |
| 厂商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分类： | XO, clock |
| 英文描述： | Y2K-Compliant, Nonvolatile Timekeeping RAMs |
| 中文描述： | 0 TIMER(S), REAL TIME CLOCK, DMA34 |
| 封装： | LEAD FREE, POWERCAP MODULE-34 |
| 文件页数： | 14/16页 |
| 文件大小： | 190K |
| 代理商： | DS1743P-100IND+ |
DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMs
7 of 16
WRITING DATA TO RAM OR CLOCK
The DS1743 is in the write mode whenever
WE, and CE are in their active state. The start of a write is
referenced to the latter occurring transition of
WE, on CE. The addresses must be held valid throughout the
cycle.
CE or WE must return inactive for a minimum of t
WR prior to the initiation of another read or write
cycle. Data in must be valid tDS prior to the end of write and remain valid for tDH afterward. In a typical
application, the
OE signal will be high during a write cycle. However, OE can be active provided that care
is taken with the data bus to avoid bus contention. If
OE is low prior to WE transitioning low the data bus
can become active with read data defined by the address inputs. A low transition on
WE will then disable
the outputs tWEZ after WE goes active.
DATA-RETENTION MODE
The 5V device is fully accessible and data can be written or read only when VCC is greater than VPF.
However, when VCC is below the power-fail point, VPF, (point at which write protection occurs) the
internal clock registers and SRAM are blocked from any access. At this time (PowerCap only) the power-
fail reset-output signal (
RST) is driven active and remains active until V
CC returns to nominal levels. When
VCC falls below the battery switch point VSO (battery supply level), device power is switched from the VCC
in to the backup battery. RTC operation and SRAM data are maintained from the battery until VCC is
returned to nominal levels.
The 3.3V device is fully accessible and data can be written or read only when VCC is greater than VPF.
When VCC falls below the power-fail point, VPF, access to the device is inhibited. At this time the power-
fail reset-output signal (
RST) is driven active and remains active until V
CC returns to nominal levels. If VPF
is less than VSO, the device power is switched from VCC to the backup supply (VBAT) when VCC drops
below VPF. If VPF is greater than VSO, the device power is switched from VCC to the backup supply (VBAT)
when VCC drops below VSO. RTC operation and SRAM data are maintained from the battery until VCC is
returned to nominal levels. The
RST (PowerCap only) signal is an open-drain output and requires a pullup
resistor. Except for
RST, all control, data, and address signals must be powered down when V
CC is
powered down.
BATTERY LONGEVITY
The DS1743 has a lithium power source that is designed to provide energy for clock activity and clock and
RAM data retention when the VCC supply is not present. The capability of this internal power supply is
sufficient to power the DS1743 continuously for the life of the equipment in which it is installed. For
specification purposes, the life expectancy is 10 years at +25
C with the internal clock oscillator running in
the absence of VCC power. Each DS1743 is shipped from Dallas Semiconductor with its lithium energy
source disconnected, guaranteeing full energy capacity. When VCC is first applied at a level greater than
VPF, the lithium energy source is enabled for battery backup operation. Actual life expectancy of the
DS1743 will be longer than 10 years since no lithium battery energy is consumed when VCC is present.
BATTERY MONITOR
The DS1743 constantly monitors the battery voltage of the internal battery. The battery flag bit (bit 7) of
the day register is used to indicate the voltage level range of the battery. This bit is not writeable and
should always be a 1 when read. If a 0 is ever present, an exhausted lithium energy source is indicated and
both the contents of the RTC and RAM are questionable.
相关PDF资料 |
PDF描述 |
|---|---|
| DS1743P-85+ | Y2K-Compliant, Nonvolatile Timekeeping RAMs |
| DS1743W-120+ | Y2K-Compliant, Nonvolatile Timekeeping RAMs |
| DS1743W-120IND+ | Y2K-Compliant, Nonvolatile Timekeeping RAMs |
| DS1743W-150+ | Y2K-Compliant, Nonvolatile Timekeeping RAMs |
| DS1743WP-120+ | Y2K-Compliant, Nonvolatile Timekeeping RAMs |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS1743P-100IND+ | 功能描述:实时时钟 Timekeeping NV RAM RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| DS1743P-70 | 功能描述:实时时钟 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| DS1743P-70+ | 功能描述:实时时钟 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| DS1743P-85+ | 功能描述:实时时钟 Timekeeping NV RAM RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| DS1743P-85IND+ | 功能描述:实时时钟 Timekeeping NV RAM RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
发布紧急采购，3分钟左右您将得到回复。