- 您现在的位置：买卖IC网 > PDF目录1994 > DS1743P-70+ (Maxim Integrated Products)IC RTC RAM Y2K 5V 70NS 34-PCM PDF资料下载
参数资料
| 型号： | DS1743P-70+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 12/17页 |
| 文件大小： | 0K |
| 描述： | IC RTC RAM Y2K 5V 70NS 34-PCM |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 40 |
| 类型： | 时钟/日历 |
| 特点： | 闰年，NVSRAM，Y2K |
| 存储容量： | 8KB |
| 时间格式： | HH:MM:SS（24 小时） |
| 数据格式： | YY-MM-DD-dd |
| 接口： | 并联 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 电压 - 电源，电池： | 3V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 34-PowerCap? 模块 |
| 供应商设备封装： | 34-PowerCap 模块 |
| 包装： | 管件 |
DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMs
4 of 17
TIME AND DATE OPERATION
The time and date information is obtained by reading the appropriate register bytes. Table 2 shows the
RTC registers. The time and date are set or initialized by writing the appropriate register bytes. The
contents of the time and date registers are in the BCD format. The day-of-week register increments at
midnight. Values that correspond to the day of week are user-defined, but must be sequential (i.e., if 1
equals Sunday, then 2 equals Monday and so on). Illogical time and date entries result in undefined
operation.
CLOCK OPERATIONS-READING THE CLOCK
While the double-buffered register structure reduces the chance of reading incorrect data, internal updates
to the DS1743 clock registers should be halted before clock data is read to prevent reading of data in
transition. However, halting the internal clock register updating process does not affect clock accuracy.
Updating is halted when a 1 is written into the read bit, bit 6 of the century register (see Table 2). As long
as a 1 remains in that position, updating is halted. After a halt is issued, the registers reflect the count that
is day, date, and time that was current at the moment the halt command was issued. However, the internal
clock registers of the double-buffered system continue to update so that the clock accuracy is not affected
by the access of data. All the DS1743 registers are updated simultaneously after the internal clock register
updating process has been re-enabled. Updating is within a second after the read bit is written to 0.
The READ bit must be a zero for a minimum of 500s to ensure the external registers are updated.
相关PDF资料 |
PDF描述 |
|---|---|
| DS1744-70IND | IC RTC RAM Y2K 5V 70NS 28-EDIP |
| DS1746-70IND | IC RTC RAM Y2K 5V 70NS 32-EDIP |
| DS1747W-120IND | IC RTC RAM Y2K 3.3V 120NS 32EDIP |
| DS17887-3-IND | IC RTC 3V 8K NV RAM 24-EDIP |
| DS1851E-010+ | IC DAC DUAL NV TEMP CNTRL 8TSSOP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS1743P-70+ | 功能描述:实时时钟 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| DS1743P-85+ | 功能描述:实时时钟 Timekeeping NV RAM RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| DS1743P-85IND+ | 功能描述:实时时钟 Timekeeping NV RAM RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| DS1743P-C01+ | 制造商:Maxim Integrated Products 功能描述:Y2KC RAM PCAP 8KX8 100NS ROCKWELL - Trays |
| DS1743W-120 | 功能描述:实时时钟 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
发布紧急采购，3分钟左右您将得到回复。