参数资料
型号: DS1854E-050
厂商: Maxim Integrated Products
文件页数: 4/22页
文件大小: 0K
描述: IC RES TEMP-CNTRL 50/50K 16TSSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 96
接片: 256
电阻(欧姆): 50k
电路数: 2
温度系数: 标准值 50 ppm/°C
存储器类型: 非易失
接口: I²C(设备位址)
电源电压: 3 V ~ 5.5 V
工作温度: -40°C ~ 95°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 16-TSSOP
包装: 管件
DS1854
Register Map
A description of the registers is below. The registers
are read only (R) or read/write (R/W). The R/W registers
are writable only if write protect has not been asserted
(see the Memory Description section).
Dual Temperature-Controlled
Resistors with Two Monitors
12
____________________________________________________________________
MEMORY LOCATION
EEPROM/SRAM
R/W
DEFAULT SETTING
NAME OF LOCATION
FUNCTION
00 to 7F
EEPROM
R/W
00
Standards Data
Auxiliary Device
MEMORY
LOCATION
EEPROM/
SRAM
R/W
DEFAULT
SETTING
NAME OF LOCATION
FUNCTION
00 to 01
EEPROM
R/W
00
TMPlimhi (MSB to LSB)
Contains upper limit settings for temperature.
If the limit is violated, a flag in Main Device
byte 70h is set.
02 to 03
EEPROM
R/W
00
TMPlimlo (MSB to LSB)
Contains lower limit settings for temperature.
If the limit is violated, a flag in Main Device
byte 70h is set.
04 to 07
EEPROM
R
00
Reserved
08 to 09
EEPROM
R/W
00
VCClimhi (MSB to LSB)
Contains upper limit settings for VCC. If the
limit is violated, a flag in Main Device byte
70h is set.
0A to 0B
EEPROM
R/W
00
VCClimlo (MSB to LSB)
Contains lower limit settings for VCC. If the
limit is violated, a flag in Main Device byte
70h is set.
0C to 0F
EEPROM
00
Reserved
10 to 11
EEPROM
R/W
00
MON1limhi (MSB to LSB)
Contains upper limit settings for MON1. If the
limit is violated, a flag in Main Device byte
70h is set.
12 to 13
EEPROM
R/W
00
MON1limlo (MSB to LSB)
Contains lower limit settings for MON1. If the
limit is violated, a flag in Main Device byte
70h is set.
14 to 17
EEPROM
00
Reserved
18 to 19
EEPROM
R/W
00
MON2limhi (MSB to LSB)
Contains upper limit settings for MON2. If the
limit is violated, a flag in Main Device byte
70h is set.
1A to 1B
EEPROM
R/W
00
MON2limlo (MSB to LSB)
Contains lower limit settings for MON2. If the
limit is violated, a flag in Main Device byte
70h is set.
Main Device
Note: SRAM defaults are power-on defaults. EEPROM defaults are factory defaults.
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