参数资料
型号: DS1858E-050
厂商: Maxim Integrated Products
文件页数: 5/22页
文件大小: 0K
描述: IC RES TEMP 50/50K 3MON 16-TSSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 96
接片: 256
电阻(欧姆): 50k
电路数: 2
温度系数: 标准值 50 ppm/°C
存储器类型: 非易失
接口: I²C(设备位址)
电源电压: 3 V ~ 5.5 V
工作温度: -40°C ~ 95°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 16-TSSOP
包装: 管件
DS1858
Dual Temperature-Controlled
Resistors with Three Monitors
____________________________________________________________________
13
MEMORY
LOCATION
(hex)
EEPROM/
SRAM
R/W
DEFAULT
SETTING
(hex)
NAME OF LOCATION
FUNCTION
20 to 21
EEPROM
R/W
00
MON3limhi (MSB to LSB)
Contains upper limit settings for MON3. If the
limit is violated, a flag in Main Device byte 71h
is set.
22 to 23
EEPROM
R/W
00
MON3limhi (MSB to LSB)
Contains lower limit settings for MON3. If the
limit is violated, a flag in Main Device byte 71h
is set.
24 to 5F
EEPROM
00
Reserved
60 to 61
SRAM
R
Measured TMP
(MSB to LSB)
Digitized measured value for temperature.
See Table 1.
62 to 63
SRAM
R
Measured VCC
(MSB to LSB)
Digitized measured value for VCC.
See Table 1.
64 to 65
SRAM
R
Measured MON1
(MSB to LSB)
Digitized measured value for MON1.
See Table 1.
66 to 67
SRAM
R
Measured MON2
(MSB to LSB)
Digitized measured value for MON2.
See Table 1.
68 to 69
SRAM
R
Measured MON3
(MSB to LSB)
Digitized measured value for MON3.
See Table 1.
6A to 6D
SRAM
R
Reserved
6E
SRAM
——
Logic states
Bit 7
R
X
HIZSTA
Resistor status bit. A high indicates that both
resistors are in high-impedance mode. A low
indicates that both resistors are operating
normally.
6
R/W
0
HIZCO
Resistor control bit. Setting this bit high
causes both resistors to go into a high-
impedance state.
5
——
XX
4
——
XX
2
R
X
TXF
This status bit is high when OUT1 is high
assuming there is an external pullup resistor
on OUT1.
3
——
XX
1
R
X
RXL
This status bit is high when OUT2 is high
assuming there is an external pullup resistor
on OUT2.
0
R
X
RDYB
This status bit goes high when VCC has fallen
below the POA level.
Main Device (continued)
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