参数资料
型号: DS1877T+
厂商: Maxim Integrated Products
文件页数: 6/65页
文件大小: 0K
描述: IC CTLR/MON SFP 1-2CH 28TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 60
类型: SFP+ 控制器
输入类型: 逻辑
输出类型: 逻辑
接口: I²C
电流 - 电源: 2.5mA
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-TQFN-EP(5x5)
包装: 托盘
其它名称: 90-1877T+000
14
Maxim Integrated
SFP Controller for Dual Rx Interface
DS1877
Monitors and Fault Detection
Monitors
Monitoring functions on the device include two QT com-
parators and four ADC channels. This monitoring com-
bined with the alarm enables (Table 01h/05h) determines
when/if the device triggers the FAULT and/or LOSOUT
outputs. All the monitoring levels and interrupt masks are
user programmable.
Two Quick-Trip Monitors and Alarms
Two quick-trip monitors are provided that monitor the
following:
1) Loss of signal 1 (LOS1 LO)
2) Loss of signal 2 (LOS2 LO)
The LOS_ LO QTs compare the RSSI_ input against its
threshold setting to determine if the present received
power is below the specification. The LOS_ LO QT can
be used to set the LOSOUT pin.
Four ADC Monitors and Alarms
The ADC monitors 4 channels that measure temperature
(internal temp sensor), VCC, RSSI1, and RSSI2 using an
analog multiplexer to measure them round-robin with a
single ADC (see the ADC Timing section). The 3V chan-
nels have a customer-programmable full-scale range,
and all channels have a customer-programmable offset
value that is factory programmed to a default value (see
Table 2). Additionally, RSSI1 and RSSI2 can right-shift
results by up to 7 bits before the results are compared
to alarm thresholds or read over the I2C bus. This allows
customers with specified ADC ranges to calibrate the
ADC full scale to a factor of 1/2n of their specified range
to measure small signals. The device can then right-shift
the results by n bits to maintain the bit weight of their
specification (see the Right-Shifting ADC Result section).
The ADC results (after right-shifting, if used) are com-
pared to the alarm and warning thresholds after each
conversion, and the corresponding alarms are set that
can be used to trigger the FAULT output. These ADC
thresholds are user programmable, as are the masking
registers that can be used to prevent the alarms from
triggering the FAULT output.
ADC Timing
There are four analog channels that are digitized in a
round-robin fashion in the order as shown in Figure 3.
The total time required to convert all 4 channels is tRR
(see the Analog Voltage Monitoring Characteristics for
details).
Right-Shifting ADC Result
If the weighting of the ADC digital reading must conform
to a predetermined full-scale (PFS) value defined by
a standard’s specification (e.g., SFF-8472), then right-
shifting can be used to adjust the PFS analog measure-
ment range while maintaining the weighting of the ADC
results. The device’s range is wide enough to cover all
requirements; when the maximum input value is P 1/2
the FS value, right-shifting can be used to obtain greater
accuracy. For instance, the maximum voltage might be
1/8 the specified PFS value, so only 1/8 of the converter’s
range is effective over this range. An alternative is to cali-
brate the ADC’s full-scale range to 1/8 the readable PFS
value and use a right-shift value of 3. With this implemen-
tation, the resolution of the measurement is increased by
Table 2. ADC Default Monitor Full-Scale Ranges
Figure 3. ADC Round-Robin Timing
TEMP
VCC
RSSI1
FINE
RSSI1
COARSE
RSSI2
FINE
RSSI2
COARSE
TEMP
ONE ROUND-ROBIN ADC CYCLE
tRR
NOTE: IF THE VCC LO ALARM IS ENABLED AT POWER-UP, THE ADC ROUND-ROBIN TIMING CYCLES BETWEEN TEMPERATURE AND VCC ONLY UNTIL VCC IS ABOVE THE VCC LO
ALARM THRESHOLD.
SIGNAL (UNITS)
+FS SIGNAL
+FS HEX
-FS SIGNAL
-FS HEX
Temperature (NC)
127.996
7FFF
-128
8000
VCC (V)
6.5528
FFF8
0
0000
RSSI1, RSSI2 (V)
2.4997
FFF8
0
0000
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