参数资料
型号: DS18B20-SL+T&R
厂商: Maxim Integrated
文件页数: 16/22页
文件大小: 528K
描述: IC THERM MICROLAN PROG-RES TO-92
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,000
功能: 温度计,恒温计
传感器类型: 内部
感应温度: -55°C ~ 125°C
精确度: ±2°C(最小值)
拓扑: 寄存器库,变签式暂存器
输出类型: 1-Wire?
输出警报:
输出风扇:
电源电压: 3 V ~ 5.5 V
工作温度: -55°C ~ 125°C
安装类型: 通孔
封装/外壳: TO-226-3、TO-92-3(TO-226AA)成形引线
供应商设备封装: TO-92-3
包装: 带卷 (TR)
DS18B20
 
16 of 22 
The DS18B20 samples the 1-Wire bus during a window that lasts from 15祍 to 60祍 after the master
initiates the write time slot. If the bus is high during the sampling window, a 1 is written to the DS18B20.
If the line is low, a 0 is written to the DS18B20.
Figure 14. Read/Write Time Slot Timing Diagram 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
READ TIME SLOTS
The DS18B20 can only transmit data to the master when the master issues read time slots. Therefore, the
master must generate read time slots immediately after issuing a Read Scratchpad [BEh] or Read Power
Supply [B4h] command, so that the DS18B20 can provide the requested data. In addition, the master can
generate read time slots after issuing Convert T [44h] or Recall E
2
 [B8h] commands to find out the status
of the operation as explained in the DS18B20 Function Commands section.
 
All read time slots must be a minimum of 60祍 in duration with a minimum of a 1祍 recovery time
between slots. A read time slot is initiated by the master device pulling the 1-Wire bus low for a
minimum of 1祍 and then releasing the bus (see Figure 14). After the master initiates the read time slot,
the DS18B20 will begin transmitting a 1 or 0 on bus. The DS18B20 transmits a 1 by leaving the bus high
and transmits a 0 by pulling the bus low. When transmitting a 0, the DS18B20 will release the bus by the
end of the time slot, and the bus will be pulled back to its high idle state by the pullup resister. Output
45?/SPAN>s  
15?/SPAN>s  
V
PU
 
GND
1-WIRE BUS
60  s < T
X
 0 < 120  s
1?/SPAN>s < T
REC
 <  
DS18B20 Samples
MIN
TYP
MAX
15  s  
30  s  
> 1?/SPAN>s 
MASTER WRITE 0 SLOT 
MASTER WRITE 1 SLOT 
V
PU
 
GND
1-WIRE BUS
15?/SPAN>s  
MASTER READ 0 SLOT 
MASTER READ 1 SLOT 
Master samples 
Master samples 
START
OF SLOT 
START
OF SLOT 
> 1 ?/SPAN>s 
1?/SPAN>s < T
REC
 <  
15  s  
15?/SPAN>s  
30?/SPAN>s  
15?/SPAN>s  
DS18B20 Samples
MIN TYP MAX
LINE TYPE LEGEND
Bus master pulling low
 
DS18B20 pulling low
 
 
Resistor pullup
> 1?/SPAN>s 
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