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参数资料
| 型号： | DS1904L-F5# |
| 厂商： | Maxim Integrated |
| 文件页数： | 9/13页 |
| 文件大小： | 0K |
| 描述： | IBUTTON RTC F5 MICROCAN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| RoHS指令信息： | IButton RoHS Compliance Plan |
| 标准包装： | 30 |
| 系列： | iButton® |
| 产品目录页面： | 1431 (CN2011-ZH PDF) |
DS1904
Skip ROM [CCh]
This command can save time in a single drop bus system by allowing the bus master to access the clock
functions without providing the 64-bit ROM code. If more than one slave is present on the bus and, for
example, a read command is issued following the Skip ROM command, data collision will occur on the
bus as multiple slaves transmit simultaneously (open drain pull-downs will produce a wired-AND result).
1–WIRE SIGNALING
The DS1904 requires strict protocols to ensure data integrity. The protocol consists of four types of sig-
naling on one line: Reset Sequence with Reset Pulse and Presence Pulse, Write 0, Write 1 and Read Data.
Except for the presence pulse the bus master initiates all these signals.
The initialization sequence required to begin any communication with the DS1904 is shown in Figure 8.
A reset pulse followed by a presence pulse indicates the DS1904 is ready to send or receive data. The bus
master transmits (TX) a reset pulse (t RSTL , minimum 480 μ s). The bus master then releases the line and
goes into receive mode (RX). The 1-Wire bus is pulled to a high state via the pull-up resistor. After
detecting the rising edge on the data line, the DS1904 waits (t PDH , 15-60 μ s) and then transmits the
presence pulse (t PDL , 60-240 μ s).
INITIALIZATION PROCEDURE “RESET AND PRESENCE PULSES” Figure 8
V PULLUP
V PULLUP MIN
V IH MIN
V IL MAX
0V
MASTER TX
"RESET PULSE"
MASTER RX "PRESENCE PULSE"
t RSTH
t RSTL
t R
t PDH
t PDL
RESISTOR
MASTER
DS1904
480 μs ≤ t RSTL < ∞ *
480 μs ≤ t RSTH < ∞ **
15 μs ≤ t PDH < 60 μs
60 ≤ t PDL < 240 μs
*
**
In order not to mask interrupt signaling by other devices on the 1-Wire bus t RSTL + t R should al-
ways be less than 960 μs.
Includes recovery time
READ/WRITE TIME SLOTS
The definitions of write and read time slots are illustrated in Figure 9. The master initiates all time slots
by driving the data line low. The falling edge of the data line synchronizes the DS1904 to the master by
triggering an internal delay circuit. During write time slots, the delay circuit determines when the DS1904
will sample the data line. For a read data time slot, if a “0” is to be transmitted, the delay circuit deter-
mines how long the DS1904 will hold the data line low. If the data bit is a “1”, the DS1904 will not hold
the data line low at all.
9 of 13
相关PDF资料 |
PDF描述 |
|---|---|
| DS1920-F5+ | IBUTTON TEMPERATURE F5 |
| DS1921G-F5# | IBUTTON THERMOCHRON F5 |
| DS1921H-F5# | IBUTTON THERMOCHRON F5 |
| DS1921K# | KIT IBUTTON THERMOCHRON |
| DS1922E-F5# | IBUTTON TEMP LOGGER 4KBit F5 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS1904L-F5# | 功能描述:iButton RTC iButton RoHS:否 存储类型:SRAM 存储容量:512 B 组织: 工作电源电压:3 V to 5.25 V 接口类型:1-Wire 最大工作温度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封装 / 箱体:F5 MicroCan 制造商:Maxim Integrated |
| DS1904L-F5+ | 功能描述:iButton RoHS:否 存储类型:SRAM 存储容量:512 B 组织: 工作电源电压:3 V to 5.25 V 接口类型:1-Wire 最大工作温度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封装 / 箱体:F5 MicroCan 制造商:Maxim Integrated |
| DS1920 | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:Temperature iButton |
| DS1920+F5 | 制造商:Maxim Integrated Products 功能描述:TEMP IBTN 2PIN F5 MICROCAN - Rail/Tube |
| DS1920-F3 | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:Temperature iButton |
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