参数资料
型号: DS1972-F5+
厂商: Maxim Integrated
文件页数: 20/23页
文件大小: 0K
描述: IBUTTON EEPROM 1KBit F5
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
RoHS指令信息: IButton RoHS Compliance Plan
标准包装: 1
系列: iButton®
存储容量: 128B
存储器类型: EEPROM
产品目录页面: 1431 (CN2011-ZH PDF)
1024-Bit EEPROM iButton
POLYNOMIAL = X 16 + X 15 + X 2 + 1
X 0
1ST
STAGE
X 1
2ND
STAGE
X 2
3RD
STAGE
X 3
4TH
STAGE
X 4
5TH
STAGE
X 5
6TH
STAGE
X 6
7TH
STAGE
X 7
8TH
STAGE
9TH
STAGE
10TH
STAGE
11TH
STAGE
12TH
STAGE
13TH
STAGE
14TH
STAGE
15TH
STAGE
16TH
STAGE
X 8
X 9
X 10
X 11
X 12
X 13
X 14
X 15
X 16
CRC OUTPUT
INPUT DATA
Figure 13. CRC-16 Hardware Description and Polynomial
by the bus master. The DS1972 transmits this CRC only
if E[2:0] = 111b.
With the Read Scratchpad command, the CRC is gen-
erated by first clearing the CRC generator and then
shifting in the command code, the target addresses
TA1 and TA2, the E/S byte, and the scratchpad data as
they were sent by the DS1972. The DS1972 transmits
this CRC only if the reading continues through the end
of the scratchpad. For more information on generating
CRC values, refer to Application Note 27.
Command-Specific 1-Wire Communication Protocol—Legend
SYMBOL
RST
PD
Select
WS
RS
CPS
RM
TA
TA-E/S
<8 –T[2:0] bytes>
<Data to EOM>
CRC-16
FF Loop
AA Loop
Programming
DESCRIPTION
1-Wire reset pulse generated by master.
1-Wire presence pulse generated by slave.
Command and data to satisfy the ROM function protocol.
Command “Write Scratchpad.”
Command “Read Scratchpad.”
Command “Copy Scratchpad.”
Command “Read Memory.”
Target address TA1, TA2.
Target address TA1, TA2 with E/S byte.
Transfer of as many bytes as needed to reach the end of the scratchpad for a given target address.
Transfer of as many data bytes as are needed to reach the end of the memory.
Transfer of an inverted CRC-16.
Indefinite loop where the master reads FF bytes.
Indefinite loop where the master reads AA bytes.
Data transfer to EEPROM; no activity on the 1-Wire bus permitted during this time.
20
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