参数资料
型号: DS2117MB
厂商: Maxim Integrated Products
文件页数: 3/9页
文件大小: 0K
描述: IC TERM SCSI LVD/SE ULT-3 36SSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 31
类型: SCSI,LVD,SE
端子数: 9
电源电压: 4 V ~ 5.5 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 36-BSOP(0.295",7.50mm 宽)
供应商设备封装: 36-SSOP
包装: 管件
DS2117M
3 of 9
To ensure proper operation, the TPWR pin should be connected to the SCSI bus TERMPWR line. As
with all analog circuitry, the TERMPWR and VDD lines should be bypassed locally. A 2.2F capacitor
and a 0.01
F high frequency capacitor are recommended between TPWR and ground and placed as close
as possible to the DS2117M. The DS2117M should be placed as close as possible to the SCSI connector
to minimize signal and power trace length, thereby resulting in less input capacitance and reflections
which can degrade the bus signals.
To maintain the specified regulation, a 4.7
F capacitor is required between the VREF pin (VREF) and
ground of each DS2117M. A high frequency cap (0.1
F ceramic recommended) can also be placed on the
VREF pin in applications that use fast rise/fall time drivers. A typical SCSI bus configuration is shown in
Figure 2.
DIFFSENS NOISE FILTERING
The DS2117M incorporates a digital filter to remove high-frequency transients on the DIFFSENS control
line, thereby eliminating erroneous switching between modes. This filter eliminates the need for the
external capacitor and resistor, which heretofore performed this function. The external filter can be used
in addition to the digital filter if the DS2117M and DS2118M are to be used interchangeably.
NOTE:
DIFFSENS—Refers to the SCSI bus signal.
DIFFSENSE—Refers to the DS2117M pin name and internal circuitry capable of driving the DIFFSENS
line.
DIFF_CAP—Refers to the DS2117M pin name and internal circuitry relating to monitoring the
DIFFSENS line.
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