参数资料
型号: DS21600N
厂商: DALLAS SEMICONDUCTOR
元件分类: Clock Driver
英文描述: PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDIP8
封装: DIP-8
文件页数: 3/17页
文件大小: 813K
代理商: DS21600N
Maxim recommends using microstrip and stripline tech-
niques to obtain full bandwidth. To ensure that the PC
board does not degrade the amplifier’s performance,
design it for a frequency greater than 1GHz. Pay care-
ful attention to inputs and outputs to avoid large para-
sitic capacitance. Whether or not you use a constant-
impedance board, observe the following guidelines
when designing the board:
Don’t use wire-wrap boards because they are too
inductive.
Don’t use IC sockets because they increase parasitic
capacitance and inductance.
Use surface-mount instead of through-hole compo-
nents for better high-frequency performance.
Use a PC board with at least two layers; it should be
as free from voids as possible.
Keep signal lines as short and as straight as possi-
ble. Do not make 90° turns; round all corners.
Rail-to-Rail Outputs,
Ground-Sensing Input
The input common-mode range extends from
(VEE - 200mV) to (VCC - 2.25V) with excellent common-
mode rejection. Beyond this range, the amplifier output
is a nonlinear function of the input, but does not under-
go phase reversal or latchup.
The output swings to within 60mV of either power-
supply rail with a 2k
load. The input ground-sensing
and the rail-to-rail output substantially increase the
dynamic range. With a symmetric input in a single 5V
application, the input can swing 2.95VP-P, and the out-
put can swing 4.9VP-P with minimal distortion.
Enable Input and Disabled Output
The enable feature (EN_) allows the amplifier to be
placed in a low-power, high-output-impedance state.
Typically, the EN_ logic low input current (IIL) is small.
However, as the EN voltage (VIL) approaches the nega-
tive supply rail, IIL increases (Figure 2). A single resis-
tor connected as shown in Figure 3 prevents the rise in
the logic-low input current. This resistor provides a
feedback mechanism that increases VIL as the logic
input is brought to VEE. Figure 4 shows the resulting
input current (IIL).
When the MAX4018 is disabled, the amplifier’s output
impedance is 35k
. This high resistance and the low
2pF output capacitance make this part ideal in
RF/video multiplexer or switch applications. For larger
arrays, pay careful attention to capacitive loading. See
the Output Capacitive Loading and Stability section for
more information.
MAX4012/MAX4016/MAX4018/MAX4020
Low-Cost, High-Speed, Single-Supply
Op Amps with Rail-to-Rail Outputs
______________________________________________________________________________________
11
RF (
)
24
500
RG (
)
500
COMPONENT
RS (
)
0
RTIN (
)
49.9
56
Small-Signal -3dB Bandwidth (MHz)
200
90
RTO (
)
49.9
Table 1. Recommended Component Values
Note: RL = RO + RTO; RTIN and RTO are calculated for 50
applications. For 75 systems, RTO = 75; calculate RTIN from the
following equation:
500
49.9
105
49.9
500
250
0
62
60
49.9
500
124
49.9
25
49.9
500
100
0
100
33
49.9
500
56
49.9
11
49.9
500
50
0
25
49.9
500
20
49.9
6
49.9
GAIN (V/V)
1200
50
0
10
49.9
+1
-1
+2
-2
+5
-5
+10
-10
+25
-25
R
=
75
1-
75
R
TIN
G
相关PDF资料
PDF描述
DS2155LN DATACOM, FRAMER, PQFP100
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