参数资料
型号: DS21600SN
厂商: DALLAS SEMICONDUCTOR
元件分类: Clock Driver
英文描述: PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
封装: SOIC-16
文件页数: 4/17页
文件大小: 813K
代理商: DS21600SN
MAX4012/MAX4016/MAX4018/MAX4020
To implement the mux function, the outputs of multiple
amplifiers can be tied together, and only the amplifier
with the selected input will be enabled. All of the other
amplifiers will be placed in the low-power shutdown
mode, with their high output impedance presenting
very little load to the active amplifier output. For gains
of +2 or greater, the feedback network impedance of
all the amplifiers used in a mux application must be
considered when calculating the total load on the
active amplifier output
Output Capacitive Loading and Stability
The MAX4012/MAX4016/MAX4018/MAX4020 are opti-
mized for AC performance. They are not designed to
drive highly reactive loads, which decreases phase
margin and may produce excessive ringing and oscilla-
tion. Figure 5 shows a circuit that eliminates this prob-
lem. Figure 6 is a graph of the optimal isolation resistor
(RS) vs. capacitive load. Figure 7 shows how a capaci-
tive load causes excessive peaking of the amplifier’s
frequency response if the capacitor is not isolated from
the amplifier by a resistor. A small isolation resistor
(usually 20
to 30) placed before the reactive load
prevents ringing and oscillation. At higher capacitive
loads, AC performance is controlled by the interaction
of the load capacitance and the isolation resistor.
Figure 8 shows the effect of a 27
isolation resistor on
closed-loop response.
Coaxial cable and other transmission lines are easily
driven when properly terminated at both ends with their
characteristic impedance. Driving back-terminated
transmission lines essentially eliminates the line’s
capacitance.
Low-Cost, High-Speed, Single-Supply
Op Amps with Rail-to-Rail Outputs
12
______________________________________________________________________________________
OUT
IN-
EN_
IN+
10k
ENABLE
MAX40_ _
20
-160
050 100 150
300 350
500
-100
-120
0
mV ABOVE VEE
INPUT
CURRENT
(
A)
200 250
400 450
-60
-140
-20
-40
-80
0
-10
050 100 150
300 350
500
-7
-8
-1
mV ABOVE VEE
INPUT
CURRENT
(
A)
200 250
400 450
-3
-5
-9
-2
-4
-6
Figure 2. Enable Logic-Low Input Current vs. VIL
Figure 4. Enable Logic-Low Input Current vs. VIL with 10k
Series Resistor
Figure 3. Circuit to Reduce Enable Logic-Low Input Current
相关PDF资料
PDF描述
DS21600N PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDIP8
DS2155LN DATACOM, FRAMER, PQFP100
DS21602N PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDIP8
DS21602SN PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
DS21604N PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDIP8
相关代理商/技术参数
参数描述
DS21600SN/T&R 制造商:Maxim Integrated Products 功能描述:DS21600SN SOIC IND T&R - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC CLOCK RATE ADAPTER 16SOIC 制造商:Maxim Integrated Products 功能描述:Clock Generators & Support Products 3.3/5V Clock Rate Adapter
DS21600SN/T&R 功能描述:时钟发生器及支持产品 3.3/5V Clock Rate Adapter RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56
DS21600SN+ 功能描述:时钟发生器及支持产品 3.3/5V Clock Rate Adapter RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56
DS21600SN+T&R 制造商:Maxim Integrated Products 功能描述: 制造商:Maxim Integrated Products 功能描述:CLOCK RATE ADPTR 16SOIC W - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC ADAPT CLK RATE 3.3V/5V 16SOIC 制造商:Maxim Integrated Products 功能描述:Clock Generators & Support Products 3.3/5V Clock Rate Adapter
DS21600SN+T&R 功能描述:时钟发生器及支持产品 3.3/5V Clock Rate Adapter RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56