参数资料
型号: DS2174QN+T&R
厂商: Maxim Integrated Products
文件页数: 19/24页
文件大小: 0K
描述: IC BERT ENHANCED 44-PLCC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 500
功能: 增强型位误码率测试器(EBERT)
接口: E1,J1,T1
电路数: 1
电源电压: 3 V ~ 3.6 V
电流 - 电源: 50mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 44-LCC(J 形引线)
供应商设备封装: 44-PLCC(16.59x16.59)
包装: 带卷 (TR)
包括: 错误计数器,样式发生器和检测器
DS2174
4 of 24
1. GENERAL OPERATION
1.1 Pattern Generation
1.1.1 Polynomial Generation
The DS2174 has a tap select register that can be used as a mask to tap up to 32 bits in the feedback path
of the polynomial generator. It also features a seed register that can be used to preload the polynomial
generator with a seed value. This is done on the rising edge of TL in Control Register 1.
The DS2174 generates polynomial patterns of any length up to and including 232 - 1. All of the industry-
standard polynomials can be programmed using the control registers. The polynomial is generated using a
shift register of programmable length and programmable feedback tap positions. The user has access to
all combinations of pattern length and pattern tap location to generate industry-standard polynomials or
other combinations as well. In addition, the QRSS pattern described in T1.403 is described by the
polynomial 220 – 1. This pattern has the additional requirement that “an output bit is forced to a 1
whenever the next 14 bits are 0.” Setting the QRSS bit in Control Register 1 causes the pattern generator
to enforce this rule.
1.1.2 Repetitive Pattern Generation
In addition to polynomial patterns, the DS2174 generates repetitive patterns of considerable length. The
programmer has access to 512 bytes of memory for storing pattern. The pattern length bits PL0 through
PL8, located at addresses 02h and 03h, are used to program the length of the repetitive pattern. Memory is
addressed indirectly and is used to store the pattern. Data can be sent MSB or LSB first as it appears in
the memory.
Repetitive patterns can include simple patterns such as 3 in 24, but the additional memory can be used to
store patterns such as DDS-n patterns or T1-n patterns. Repetitive patterns are stored in increments of 8
bits. To generate a repetitive pattern that is 12 bits long (3 nibbles), the pattern is written twice such that
the pattern is 24 bits long (3 bytes), and repeats twice in memory. The same is true when the device is
used in serial mode: a 5-bit pattern is written to memory 5 times. For example,
To generate a 00001 pattern at the serial output, write these bytes to memory:
RAM ADDRESS
BINARY CODE
HEX CODE
00h
00010000
10h
01h
01000010
42h
02h
00001000
08h
03h
00100001
21h
04h
10000100
84h
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