DS21Q58 E1 Quad Transceiver
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LIST OF FIGURES
Figure 3-1. Block Diagram....................................................................................................................... 7
Figure 6-1. Serial Port Operation Mode 1...............................................................................................14
Figure 6-2. Serial Port Operation Mode 2...............................................................................................15
Figure 6-3. Serial Port Operation Mode 3...............................................................................................15
Figure 6-4. Serial Port Operation Mode 4...............................................................................................15
Figure 21-1 Typical Monitor Port Application ..........................................................................................48
Figure 21-2. External Analog Connections (Basic Configuration) ...........................................................49
Figure 21-3. External Analog Connections (Protected Interface)............................................................50
Figure 21-4. Transmit Waveform Template ............................................................................................51
Figure 21-5. Jitter Tolerance...................................................................................................................52
Figure 21-6. Jitter Attenuation ................................................................................................................52
Figure 22-1. CMI Coding ........................................................................................................................53
Figure 22-2. Example of CMI Code Violation..........................................................................................54
Figure 23-1. IBO Configuration Using Two DS21Q58 Transceivers (Eight E1 Lines)..............................56
Figure 24-1. Receive Frame and Multiframe Timing...............................................................................57
Figure 24-2. Receive Boundary Timing (With Elastic Store Disabled).....................................................57
Figure 24-3. Receive Boundary Timing (With Elastic Store Enabled) .....................................................57
Figure 24-4. Receive Interleave Bus Operation......................................................................................58
Figure 24-5. Transmit Frame and Multiframe Timing..............................................................................59
Figure 24-6. Transmit Boundary Timing..................................................................................................59
Figure 24-7. Transmit Interleave Bus Operation.....................................................................................59
Figure 24-8. Framer Synchronization Flowchart.....................................................................................60
Figure 24-9. Transmit Data Flow ............................................................................................................61
Figure 26-1. Intel Bus Read AC Timing (PBTS = 0)................................................................................64
Figure 26-2. Intel Bus Write Timing (PBTS = 0)......................................................................................64
Figure 26-3. Motorola Bus AC Timing (PBTS = 1)..................................................................................65
Figure 26-4. Intel Bus Read Timing (PBTS = 0)......................................................................................66
Figure 26-5. Intel Bus Write Timing (PBTS = 0)......................................................................................67
Figure 26-6. Motorola Bus Read Timing (PBTS = 1)...............................................................................67
Figure 26-7. Motorola Bus Write Timing (PBTS = 1)...............................................................................67
Figure 26-8. Serial Bus Timing (BTS1 = 1, BTS0 = 0) ............................................................................68
Figure 26-9. Receive AC Timing (Receive Elastic Store Disabled).........................................................69
Figure 26-10. Receive AC Timing (Receive Elastic Store Enabled)........................................................70
Figure 26-11. Transmit AC Timing (IBO Disabled)..................................................................................71
Figure 26-12. Transmit AC Timing (IBO Enabled) ..................................................................................72
Figure 26-13. NRZ Input AC Timing .......................................................................................................72